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preempt.h
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1/*
2 * DCL <asm/preempt.h> -- the preemption counter, on a kernel that does not
3 * preempt.
4 *
5 * mainline's arch/arm64/include/asm/preempt.h keeps the count in
6 * current_thread_info()->preempt, which is why its five functions all read
7 * and WRITE_ONCE that field. DCL has no thread_info, no CONFIG_PREEMPT_COUNT
8 * and no scheduler path that would ever increment or decrement the count:
9 * <linux/preempt.h>:276 puts preempt_disable()/preempt_enable() in the
10 * !CONFIG_PREEMPT_COUNT arm, where both are `barrier()`. So nothing in this
11 * image can move the counter, and inventing storage for a value that no code
12 * can change would be a number that only looks like evidence.
13 *
14 * Returning 0 is therefore the truthful reading rather than a placeholder:
15 * "not in an interrupt, not in an atomic section, safe to sleep". Its one
16 * consequence worth naming is drm_util.h:64, where drm_can_sleep() is
17 * `in_atomic() || in_dbg_master() || irqs_disabled()` -- the first two terms
18 * are now always false and the last is a real DAIF read (<linux/irqflags.h>),
19 * which is the half of that check DCL can actually answer. A lock taken from
20 * a hardware interrupt will still be caught, because the GIC dispatcher runs
21 * with interrupts masked.
22 *
23 * The mutators are kept because <linux/preempt.h> spells preempt_count_add(),
24 * preempt_count_sub() and preempt_count_dec_and_test() as calls to them
25 * (:197-:201) and every driver in this tree may use those macros; a missing
26 * one would fail in the driver rather than here. They are no-ops for the
27 * same reason preempt_count() is a constant.
28 *
29 * No current_thread_info(), so no <linux/thread_info.h>: that header needs
30 * a per-task struct DCL does not model.
31 */
32#ifndef __ASM_PREEMPT_H
33#define __ASM_PREEMPT_H
34
35/*
36 * arm64's need_resched lives above the 8/8/4/4 field layout that
37 * <linux/preempt.h>:33-48 carves out of the low 24 bits. 1ULL rather than
38 * mainline's BIT(32): this target is aarch64-unknown-windows, which is LLP64,
39 * so `1UL` is 32 bits wide and `1UL << 32` would be undefined behaviour
40 * rather than a flag.
41 */
42#define PREEMPT_NEED_RESCHED (1ULL << 32)
43#define PREEMPT_ENABLED (PREEMPT_NEED_RESCHED)
44
45static inline int preempt_count(void)
46{
47 return 0;
48}
49
50static inline void preempt_count_set(unsigned long long pc)
51{
52 (void)pc;
53}
54
55static inline void set_preempt_need_resched(void)
56{
57}
58
59static inline void clear_preempt_need_resched(void)
60{
61}
62
63static inline bool test_preempt_need_resched(void)
64{
65 return false;
66}
67
68static inline void __preempt_count_add(int val)
69{
70 (void)val;
71}
72
73static inline void __preempt_count_sub(int val)
74{
75 (void)val;
76}
77
78static inline bool __preempt_count_dec_and_test(void)
79{
80 return false;
81}
82
83static inline bool should_resched(int preempt_offset)
84{
85 (void)preempt_offset;
86 return false;
87}
88
89#endif /* __ASM_PREEMPT_H */