XenevaOS
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XenevaOS
BaseHdr
video
vga.h
Go to the documentation of this file.
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/* SPDX-License-Identifier: MIT */
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#ifndef __LINUX_VIDEO_VGA_H
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#define __LINUX_VIDEO_VGA_H
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/*
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* DCL <video/vga.h> -- the four VGA register constants bochs.c names, in
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* upstream's spelling (include/video/vga.h:43-76 in linux-7.2.6).
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*
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* mainline's header is the full VGA register map plus vga_r/vga_w/vga_io_r
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* inline accessors for vgacon. The vendored bochs driver uses none of that:
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* its VGA touch is bochs_hw_blank()'s three-port sequence -- write the misc
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* output register, read input status 1 to clear the attribute flip-flop,
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* then write the attribute register. The offsets below are those three
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* registers and the one bit the sequence sets; everything else the header
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* carries is console code this tree does not build.
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*
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* The values are the register *port numbers* on an x86 VGA device. bochs
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* reaches them either through the qemu stdvga's register window (its MMIO
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* BAR offset 0x400+ holds them, which is the path this target takes) or
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* through x86 port I/O (the arm that cannot run here; see <asm/io.h>).
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*/
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#define VGA_ATT_W 0x3C0
/* Attribute Controller Data Write Register */
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#define VGA_MIS_W 0x3C2
/* Misc Output Write Register */
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#define VGA_IS1_RC 0x3DA
/* Input Status Register 1 - color emulation */
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#define VGA_MIS_COLOR 0x01
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#endif
/* __LINUX_VIDEO_VGA_H */
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