Go to the source code of this file.
◆ DRM_ELD_AUD_SYNCH_DELAY
| #define DRM_ELD_AUD_SYNCH_DELAY 6 /* in units of 2 ms */ |
◆ DRM_ELD_AUD_SYNCH_DELAY_MAX
| #define DRM_ELD_AUD_SYNCH_DELAY_MAX 0xfa /* 500 ms */ |
◆ DRM_ELD_BASELINE_ELD_LEN
| #define DRM_ELD_BASELINE_ELD_LEN 2 /* in dwords! */ |
◆ DRM_ELD_CEA_EDID_VER_CEA861
| #define DRM_ELD_CEA_EDID_VER_CEA861 (1 << 5) |
◆ DRM_ELD_CEA_EDID_VER_CEA861A
| #define DRM_ELD_CEA_EDID_VER_CEA861A (2 << 5) |
◆ DRM_ELD_CEA_EDID_VER_CEA861BCD
| #define DRM_ELD_CEA_EDID_VER_CEA861BCD (3 << 5) |
◆ DRM_ELD_CEA_EDID_VER_MASK
| #define DRM_ELD_CEA_EDID_VER_MASK (7 << 5) |
◆ DRM_ELD_CEA_EDID_VER_MNL
| #define DRM_ELD_CEA_EDID_VER_MNL 4 |
◆ DRM_ELD_CEA_EDID_VER_NONE
| #define DRM_ELD_CEA_EDID_VER_NONE (0 << 5) |
◆ DRM_ELD_CEA_EDID_VER_SHIFT
| #define DRM_ELD_CEA_EDID_VER_SHIFT 5 |
◆ DRM_ELD_CEA_SAD
| #define DRM_ELD_CEA_SAD |
( |
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mnl, |
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sad |
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) |
| (20 + (mnl) + 3 * (sad)) |
◆ DRM_ELD_CONN_TYPE_DP
| #define DRM_ELD_CONN_TYPE_DP (1 << 2) |
◆ DRM_ELD_CONN_TYPE_HDMI
| #define DRM_ELD_CONN_TYPE_HDMI (0 << 2) |
◆ DRM_ELD_CONN_TYPE_MASK
| #define DRM_ELD_CONN_TYPE_MASK (3 << 2) |
◆ DRM_ELD_CONN_TYPE_SHIFT
| #define DRM_ELD_CONN_TYPE_SHIFT 2 |
◆ DRM_ELD_HEADER_BLOCK_SIZE
| #define DRM_ELD_HEADER_BLOCK_SIZE 4 |
◆ DRM_ELD_MANUFACTURER_NAME0
| #define DRM_ELD_MANUFACTURER_NAME0 16 |
◆ DRM_ELD_MANUFACTURER_NAME1
| #define DRM_ELD_MANUFACTURER_NAME1 17 |
◆ DRM_ELD_MNL_MASK
| #define DRM_ELD_MNL_MASK (0x1f << 0) |
◆ DRM_ELD_MNL_SHIFT
| #define DRM_ELD_MNL_SHIFT 0 |
◆ DRM_ELD_MONITOR_NAME_STRING
| #define DRM_ELD_MONITOR_NAME_STRING 20 /* offsets 20..(20+mnl-1) inclusive */ |
◆ DRM_ELD_PORT_ID
| #define DRM_ELD_PORT_ID 8 /* offsets 8..15 inclusive */ |
◆ DRM_ELD_PORT_ID_LEN
| #define DRM_ELD_PORT_ID_LEN 8 |
◆ DRM_ELD_PRODUCT_CODE0
| #define DRM_ELD_PRODUCT_CODE0 18 |
◆ DRM_ELD_PRODUCT_CODE1
| #define DRM_ELD_PRODUCT_CODE1 19 |
◆ DRM_ELD_SAD_COUNT_CONN_TYPE
| #define DRM_ELD_SAD_COUNT_CONN_TYPE 5 |
◆ DRM_ELD_SAD_COUNT_MASK
| #define DRM_ELD_SAD_COUNT_MASK (0xf << 4) |
◆ DRM_ELD_SAD_COUNT_SHIFT
| #define DRM_ELD_SAD_COUNT_SHIFT 4 |
◆ DRM_ELD_SPEAKER
| #define DRM_ELD_SPEAKER 7 |
◆ DRM_ELD_SPEAKER_FC
| #define DRM_ELD_SPEAKER_FC (1 << 2) |
◆ DRM_ELD_SPEAKER_FLR
| #define DRM_ELD_SPEAKER_FLR (1 << 0) |
◆ DRM_ELD_SPEAKER_FLRC
| #define DRM_ELD_SPEAKER_FLRC (1 << 5) |
◆ DRM_ELD_SPEAKER_LFE
| #define DRM_ELD_SPEAKER_LFE (1 << 1) |
◆ DRM_ELD_SPEAKER_MASK
| #define DRM_ELD_SPEAKER_MASK 0x7f |
◆ DRM_ELD_SPEAKER_RC
| #define DRM_ELD_SPEAKER_RC (1 << 4) |
◆ DRM_ELD_SPEAKER_RLR
| #define DRM_ELD_SPEAKER_RLR (1 << 3) |
◆ DRM_ELD_SPEAKER_RLRC
| #define DRM_ELD_SPEAKER_RLRC (1 << 6) |
◆ DRM_ELD_SUPPORTS_AI
| #define DRM_ELD_SUPPORTS_AI (1 << 1) |
◆ DRM_ELD_SUPPORTS_HDCP
| #define DRM_ELD_SUPPORTS_HDCP (1 << 0) |
◆ DRM_ELD_VER
◆ DRM_ELD_VER_CANNED
| #define DRM_ELD_VER_CANNED (0x1f << 3) |
◆ DRM_ELD_VER_CEA861D
| #define DRM_ELD_VER_CEA861D (2 << 3) /* supports 861D or below */ |
◆ DRM_ELD_VER_MASK
| #define DRM_ELD_VER_MASK (0x1f << 3) |
◆ DRM_ELD_VER_SHIFT
| #define DRM_ELD_VER_SHIFT 3 |
◆ drm_eld_sad_get()
| int drm_eld_sad_get |
( |
const u8 * |
eld, |
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int |
sad_index, |
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struct cea_sad * |
cta_sad |
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) |
| |
◆ drm_eld_sad_set()
| int drm_eld_sad_set |
( |
u8 * |
eld, |
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int |
sad_index, |
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const struct cea_sad * |
cta_sad |
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) |
| |