#include <stdint.h>

Include dependency graph for e1000.h:

This graph shows which files directly or indirectly include this file:

Classes
struct	_e1000_rx_desc_

struct	_e1000_tx_desc_

Macros
#define	E1000_REG_CTRL 0x0000

#define	E1000_REG_STATUS 0x0008

#define	E1000_REG_EEPROM 0x0014

#define	E1000_REG_CTRL_EXT 0x0018

#define	E1000_REG_ICR 0x00C0

#define	E1000_REG_ITR 0x00c4

#define	E1000_REG_IMS 0x00d0

#define	E1000_REG_IMC 0x00d8

#define	E1000_REG_RCTRL 0x0100

#define	E1000_REG_RXDESCLO 0x2800

#define	E1000_REG_RXDESCHI 0x2804

#define	E1000_REG_RXDESCLEN 0x2808

#define	E1000_REG_RXDESCHEAD 0x2810

#define	E1000_REG_RXDESCTAIL 0x2818

#define	E1000_REG_RDTR 0x2820

#define	E1000_REG_TCTRL 0x0400

#define	E1000_REG_TXDESCLO 0x3800

#define	E1000_REG_TXDESCHI 0x3804

#define	E1000_REG_TXDESCLEN 0x3808

#define	E1000_REG_TXDESCHEAD 0x3810

#define	E1000_REG_TXDESCTAIL 0x3818

#define	E1000_REG_RXADDR 0x5400

#define	E1000_NUM_RX_DESC 512

#define	E1000_NUM_TX_DESC 512

#define	RCTL_EN (1 << 1) /* Receiver Enable */

#define	RCTL_SBP (1 << 2) /* Store Bad Packets */

#define	RCTL_UPE (1 << 3) /* Unicast Promiscuous Enabled */

#define	RCTL_MPE (1 << 4) /* Multicast Promiscuous Enabled */

#define	RCTL_LPE (1 << 5) /* Long Packet Reception Enable */

#define	RCTL_LBM_NONE (0 << 6) /* No Loopback */

#define	RCTL_LBM_PHY (3 << 6) /* PHY or external SerDesc loopback */

#define	RCTL_RDMTS_HALF (0 << 8) /* Free Buffer Threshold is 1/2 of RDLEN */

#define	RCTL_RDMTS_QUARTER (1 << 8) /* Free Buffer Threshold is 1/4 of RDLEN */

#define	RCTL_RDMTS_EIGHTH (2 << 8) /* Free Buffer Threshold is 1/8 of RDLEN */

#define	RCTL_MO_36 (0 << 12) /* Multicast Offset - bits 47:36 */

#define	RCTL_MO_35 (1 << 12) /* Multicast Offset - bits 46:35 */

#define	RCTL_MO_34 (2 << 12) /* Multicast Offset - bits 45:34 */

#define	RCTL_MO_32 (3 << 12) /* Multicast Offset - bits 43:32 */

#define	RCTL_BAM (1 << 15) /* Broadcast Accept Mode */

#define	RCTL_VFE (1 << 18) /* VLAN Filter Enable */

#define	RCTL_CFIEN (1 << 19) /* Canonical Form Indicator Enable */

#define	RCTL_CFI (1 << 20) /* Canonical Form Indicator Bit Value */

#define	RCTL_DPF (1 << 22) /* Discard Pause Frames */

#define	RCTL_PMCF (1 << 23) /* Pass MAC Control Frames */

#define	RCTL_SECRC (1 << 26) /* Strip Ethernet CRC */

#define	RCTL_BSIZE_256 (3 << 16)

#define	RCTL_BSIZE_512 (2 << 16)

#define	RCTL_BSIZE_1024 (1 << 16)

#define	RCTL_BSIZE_2048 (0 << 16)

#define	RCTL_BSIZE_4096 ((3 << 16) \| (1 << 25))

#define	RCTL_BSIZE_8192 ((2 << 16) \| (1 << 25))

#define	RCTL_BSIZE_16384 ((1 << 16) \| (1 << 25))

#define	TCTL_EN (1 << 1) /* Transmit Enable */

#define	TCTL_PSP (1 << 3) /* Pad Short Packets */

#define	TCTL_CT_SHIFT 4 /* Collision Threshold */

#define	TCTL_COLD_SHIFT 12 /* Collision Distance */

#define	TCTL_SWXOFF (1 << 22) /* Software XOFF Transmission */

#define	TCTL_RTLC (1 << 24) /* Re-transmit on Late Collision */

#define	CMD_EOP (1 << 0) /* End of Packet */

#define	CMD_IFCS (1 << 1) /* Insert FCS */

#define	CMD_IC (1 << 2) /* Insert Checksum */

#define	CMD_RS (1 << 3) /* Report Status */

#define	CMD_RPS (1 << 4) /* Report Packet Sent */

#define	CMD_VLE (1 << 6) /* VLAN Packet Enable */

#define	CMD_IDE (1 << 7) /* Interrupt Delay Enable */

#define	ICR_TXDW (1 << 0)

#define	ICR_TXQE (1 << 1) /* Transmit queue is empty */

#define	ICR_LSC (1 << 2) /* Link status changed */

#define	ICR_RXSEQ (1 << 3) /* Receive sequence count error */

#define	ICR_RXDMT0 (1 << 4) /* Receive descriptor minimum threshold */

#define	ICR_RXO (1 << 6) /* Receive overrun */

#define	ICR_RXT0 (1 << 7) /* Receive timer interrupt? */

#define	ICR_ACK (1 << 17)

#define	ICR_SRPD (1 << 16)

Typedefs
typedef struct _e1000_rx_desc_	e1000_rx_desc

typedef struct _e1000_tx_desc_	e1000_tx_desc

Macro Definition Documentation

◆ CMD_EOP

#define CMD_EOP (1 << 0) /* End of Packet */

◆ CMD_IC

#define CMD_IC (1 << 2) /* Insert Checksum */

◆ CMD_IDE

#define CMD_IDE (1 << 7) /* Interrupt Delay Enable */

◆ CMD_IFCS

#define CMD_IFCS (1 << 1) /* Insert FCS */

◆ CMD_RPS

#define CMD_RPS (1 << 4) /* Report Packet Sent */

◆ CMD_RS

#define CMD_RS (1 << 3) /* Report Status */

◆ CMD_VLE

#define CMD_VLE (1 << 6) /* VLAN Packet Enable */

◆ E1000_NUM_RX_DESC

#define E1000_NUM_RX_DESC 512

◆ E1000_NUM_TX_DESC

#define E1000_NUM_TX_DESC 512

◆ E1000_REG_CTRL

#define E1000_REG_CTRL 0x0000

BSD 2-Clause License

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

◆ E1000_REG_CTRL_EXT

#define E1000_REG_CTRL_EXT 0x0018

◆ E1000_REG_EEPROM

#define E1000_REG_EEPROM 0x0014

◆ E1000_REG_ICR

#define E1000_REG_ICR 0x00C0

◆ E1000_REG_IMC

#define E1000_REG_IMC 0x00d8

◆ E1000_REG_IMS

#define E1000_REG_IMS 0x00d0

◆ E1000_REG_ITR

#define E1000_REG_ITR 0x00c4

◆ E1000_REG_RCTRL

#define E1000_REG_RCTRL 0x0100

◆ E1000_REG_RDTR

#define E1000_REG_RDTR 0x2820

◆ E1000_REG_RXADDR

#define E1000_REG_RXADDR 0x5400

◆ E1000_REG_RXDESCHEAD

#define E1000_REG_RXDESCHEAD 0x2810

◆ E1000_REG_RXDESCHI

#define E1000_REG_RXDESCHI 0x2804

◆ E1000_REG_RXDESCLEN

#define E1000_REG_RXDESCLEN 0x2808

◆ E1000_REG_RXDESCLO

#define E1000_REG_RXDESCLO 0x2800

◆ E1000_REG_RXDESCTAIL

#define E1000_REG_RXDESCTAIL 0x2818

◆ E1000_REG_STATUS

#define E1000_REG_STATUS 0x0008

◆ E1000_REG_TCTRL

#define E1000_REG_TCTRL 0x0400

◆ E1000_REG_TXDESCHEAD

#define E1000_REG_TXDESCHEAD 0x3810

◆ E1000_REG_TXDESCHI

#define E1000_REG_TXDESCHI 0x3804

◆ E1000_REG_TXDESCLEN

#define E1000_REG_TXDESCLEN 0x3808

◆ E1000_REG_TXDESCLO

#define E1000_REG_TXDESCLO 0x3800

◆ E1000_REG_TXDESCTAIL

#define E1000_REG_TXDESCTAIL 0x3818

◆ ICR_ACK

#define ICR_ACK (1 << 17)

◆ ICR_LSC

#define ICR_LSC (1 << 2) /* Link status changed */

◆ ICR_RXDMT0

#define ICR_RXDMT0 (1 << 4) /* Receive descriptor minimum threshold */

◆ ICR_RXO

#define ICR_RXO (1 << 6) /* Receive overrun */

◆ ICR_RXSEQ

#define ICR_RXSEQ (1 << 3) /* Receive sequence count error */

◆ ICR_RXT0

#define ICR_RXT0 (1 << 7) /* Receive timer interrupt? */

◆ ICR_SRPD

#define ICR_SRPD (1 << 16)

◆ ICR_TXDW

#define ICR_TXDW (1 << 0)

◆ ICR_TXQE

#define ICR_TXQE (1 << 1) /* Transmit queue is empty */

◆ RCTL_BAM

#define RCTL_BAM (1 << 15) /* Broadcast Accept Mode */

◆ RCTL_BSIZE_1024

#define RCTL_BSIZE_1024 (1 << 16)

◆ RCTL_BSIZE_16384

#define RCTL_BSIZE_16384 ((1 << 16) | (1 << 25))

◆ RCTL_BSIZE_2048

#define RCTL_BSIZE_2048 (0 << 16)

◆ RCTL_BSIZE_256

#define RCTL_BSIZE_256 (3 << 16)

◆ RCTL_BSIZE_4096

#define RCTL_BSIZE_4096 ((3 << 16) | (1 << 25))

◆ RCTL_BSIZE_512

#define RCTL_BSIZE_512 (2 << 16)

◆ RCTL_BSIZE_8192

#define RCTL_BSIZE_8192 ((2 << 16) | (1 << 25))

◆ RCTL_CFI

#define RCTL_CFI (1 << 20) /* Canonical Form Indicator Bit Value */

◆ RCTL_CFIEN

#define RCTL_CFIEN (1 << 19) /* Canonical Form Indicator Enable */

◆ RCTL_DPF

#define RCTL_DPF (1 << 22) /* Discard Pause Frames */

◆ RCTL_EN

#define RCTL_EN (1 << 1) /* Receiver Enable */

◆ RCTL_LBM_NONE

#define RCTL_LBM_NONE (0 << 6) /* No Loopback */

◆ RCTL_LBM_PHY

#define RCTL_LBM_PHY (3 << 6) /* PHY or external SerDesc loopback */

◆ RCTL_LPE

#define RCTL_LPE (1 << 5) /* Long Packet Reception Enable */

◆ RCTL_MO_32

#define RCTL_MO_32 (3 << 12) /* Multicast Offset - bits 43:32 */

◆ RCTL_MO_34

#define RCTL_MO_34 (2 << 12) /* Multicast Offset - bits 45:34 */

◆ RCTL_MO_35

#define RCTL_MO_35 (1 << 12) /* Multicast Offset - bits 46:35 */

◆ RCTL_MO_36

#define RCTL_MO_36 (0 << 12) /* Multicast Offset - bits 47:36 */

◆ RCTL_MPE

#define RCTL_MPE (1 << 4) /* Multicast Promiscuous Enabled */

◆ RCTL_PMCF

#define RCTL_PMCF (1 << 23) /* Pass MAC Control Frames */

◆ RCTL_RDMTS_EIGHTH

#define RCTL_RDMTS_EIGHTH (2 << 8) /* Free Buffer Threshold is 1/8 of RDLEN */

◆ RCTL_RDMTS_HALF

#define RCTL_RDMTS_HALF (0 << 8) /* Free Buffer Threshold is 1/2 of RDLEN */

◆ RCTL_RDMTS_QUARTER

#define RCTL_RDMTS_QUARTER (1 << 8) /* Free Buffer Threshold is 1/4 of RDLEN */

◆ RCTL_SBP

#define RCTL_SBP (1 << 2) /* Store Bad Packets */

◆ RCTL_SECRC

#define RCTL_SECRC (1 << 26) /* Strip Ethernet CRC */

◆ RCTL_UPE

#define RCTL_UPE (1 << 3) /* Unicast Promiscuous Enabled */

◆ RCTL_VFE

#define RCTL_VFE (1 << 18) /* VLAN Filter Enable */

◆ TCTL_COLD_SHIFT

#define TCTL_COLD_SHIFT 12 /* Collision Distance */

◆ TCTL_CT_SHIFT

#define TCTL_CT_SHIFT 4 /* Collision Threshold */

◆ TCTL_EN

#define TCTL_EN (1 << 1) /* Transmit Enable */

◆ TCTL_PSP

#define TCTL_PSP (1 << 3) /* Pad Short Packets */

◆ TCTL_RTLC

#define TCTL_RTLC (1 << 24) /* Re-transmit on Late Collision */

◆ TCTL_SWXOFF

#define TCTL_SWXOFF (1 << 22) /* Software XOFF Transmission */

Typedef Documentation

◆ e1000_rx_desc

typedef struct _e1000_rx_desc_ e1000_rx_desc

◆ e1000_tx_desc

typedef struct _e1000_tx_desc_ e1000_tx_desc

Classes

Macros

Typedefs