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XenevaOS
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Go to the source code of this file.
Classes | |
| struct | _gic_ |
Typedefs | |
| typedef struct _gic_ | GIC |
Functions | |
| GIC * | AuGetSystemGIC () |
| void | GICInitialize () |
| GICInitialize – initialize the gic controller, it can be parsed through ACPI MADT or hard-coding. | |
| AU_EXTERN AU_EXPORT void | GICEnableIRQ (uint32_t irq) |
| void | GICEnableSPIIRQ (uint32_t irq) |
| GICEnableIRQ – enable an SPI IRQ. | |
| AU_EXTERN AU_EXPORT void | GICClearPendingIRQ (uint32_t irq) |
| uint32_t | GICReadIAR () |
| GICReadIAR – read interrupt acknowledge register. | |
| void | GICCheckPending (uint32_t irq) |
| uint64_t | AuGICGetMSIAddress (int interruptID) |
| AuGICGetMSIAddress – calculate and return MSI address for given spi offset. | |
| uint32_t | AuGICGetMSIData (int interruptID) |
| AuGICGetMSIData – obtains composited MSI data address of respected interruptID, useful in PCIe. | |
| int | AuGICAllocateSPI () |
| AuGICAllocateSPI – allocates Shared Peripheral interrupt ID. | |
| void | AuGICDeallocateSPI (int spiID) |
| AuGICDeallocateSPI – free up an used SPI id. | |
| void | GICSendEOI (uint32_t irqnum) |
| GICSendEOI –sends end of interrupt to GIC cpu interface. | |
| void | GICSetupTimer () |
| void | GICSetTargetCPU (int spi) |
| void | GICRegisterSPIHandler (void *fptr, int spi) |
| GICRegisterSPIHandler – register a spi handler to callback list. | |
| void | GICCallSPIHandler (int spi) |
| GICCallSPIHandler – jump to a callback handler associated with given spi number. | |
BSD 2-Clause License
Copyright (c) 2022-2025, Manas Kamal Choudhury All rights reserved.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
| GIC * AuGetSystemGIC | ( | ) |
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AuGICAllocateSPI – allocates Shared Peripheral interrupt ID.
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AuGICDeallocateSPI – free up an used SPI id.
| spiID | – target spi id |
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AuGICGetMSIAddress – calculate and return MSI address for given spi offset.
| interruptID | – spi offset |
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AuGICGetMSIData – obtains composited MSI data address of respected interruptID, useful in PCIe.
| interruptID | – interrupt ID of device |
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GICCallSPIHandler – jump to a callback handler associated with given spi number.
| spi | – SPI number |
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@briefGICEnableIRQ – enable an IRQ
| irq | – IRQ number |
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GICEnableIRQ – enable an SPI IRQ.
| irq | – IRQ number |
GICEnableIRQ – enable an SPI IRQ.
| irq | – IRQ number |
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GICInitialize – initialize the gic controller, it can be parsed through ACPI MADT or hard-coding.
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GICReadIAR – read interrupt acknowledge register.
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GICRegisterSPIHandler – register a spi handler to callback list.
| fptr | – SPI Callback address |
| spi | – SPI number |
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GICSendEOI –sends end of interrupt to GIC cpu interface.
| irqnum | – interrupt ID of the device |
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