ivpu_accel.h File Reference

#include "drm.h"

Include dependency graph for ivpu_accel.h:

Go to the source code of this file.

Classes
struct	drm_ivpu_param
struct	drm_ivpu_bo_create
struct	drm_ivpu_bo_create_from_userptr
struct	drm_ivpu_bo_info
struct	drm_ivpu_submit
struct	drm_ivpu_cmdq_submit
struct	drm_ivpu_bo_wait
struct	drm_ivpu_metric_streamer_start
struct	drm_ivpu_metric_streamer_get_data
struct	drm_ivpu_cmdq_create
struct	drm_ivpu_cmdq_destroy
struct	drm_ivpu_metric_streamer_stop

Macros
#define	DRM_IVPU_GET_PARAM   0x00
#define	DRM_IVPU_SET_PARAM   0x01
#define	DRM_IVPU_BO_CREATE   0x02
#define	DRM_IVPU_BO_INFO   0x03
#define	DRM_IVPU_SUBMIT   0x05
#define	DRM_IVPU_BO_WAIT   0x06
#define	DRM_IVPU_METRIC_STREAMER_START   0x07
#define	DRM_IVPU_METRIC_STREAMER_STOP   0x08
#define	DRM_IVPU_METRIC_STREAMER_GET_DATA   0x09
#define	DRM_IVPU_METRIC_STREAMER_GET_INFO   0x0a
#define	DRM_IVPU_CMDQ_CREATE   0x0b
#define	DRM_IVPU_CMDQ_DESTROY   0x0c
#define	DRM_IVPU_CMDQ_SUBMIT   0x0d
#define	DRM_IVPU_BO_CREATE_FROM_USERPTR   0x0e
#define	DRM_IOCTL_IVPU_GET_PARAM    DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_GET_PARAM, struct drm_ivpu_param)
#define	DRM_IOCTL_IVPU_SET_PARAM    DRM_IOW(DRM_COMMAND_BASE + DRM_IVPU_SET_PARAM, struct drm_ivpu_param)
#define	DRM_IOCTL_IVPU_BO_CREATE    DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_BO_CREATE, struct drm_ivpu_bo_create)
#define	DRM_IOCTL_IVPU_BO_INFO    DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_BO_INFO, struct drm_ivpu_bo_info)
#define	DRM_IOCTL_IVPU_SUBMIT    DRM_IOW(DRM_COMMAND_BASE + DRM_IVPU_SUBMIT, struct drm_ivpu_submit)
#define	DRM_IOCTL_IVPU_BO_WAIT    DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_BO_WAIT, struct drm_ivpu_bo_wait)
#define	DRM_IOCTL_IVPU_METRIC_STREAMER_START
#define	DRM_IOCTL_IVPU_METRIC_STREAMER_STOP
#define	DRM_IOCTL_IVPU_METRIC_STREAMER_GET_DATA
#define	DRM_IOCTL_IVPU_METRIC_STREAMER_GET_INFO
#define	DRM_IOCTL_IVPU_CMDQ_CREATE    DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_CMDQ_CREATE, struct drm_ivpu_cmdq_create)
#define	DRM_IOCTL_IVPU_CMDQ_DESTROY    DRM_IOW(DRM_COMMAND_BASE + DRM_IVPU_CMDQ_DESTROY, struct drm_ivpu_cmdq_destroy)
#define	DRM_IOCTL_IVPU_CMDQ_SUBMIT    DRM_IOW(DRM_COMMAND_BASE + DRM_IVPU_CMDQ_SUBMIT, struct drm_ivpu_cmdq_submit)
#define	DRM_IOCTL_IVPU_BO_CREATE_FROM_USERPTR
#define	DRM_IVPU_PARAM_DEVICE_ID   0
#define	DRM_IVPU_PARAM_DEVICE_REVISION   1
#define	DRM_IVPU_PARAM_PLATFORM_TYPE   2
#define	DRM_IVPU_PARAM_CORE_CLOCK_RATE   3
#define	DRM_IVPU_PARAM_NUM_CONTEXTS   4
#define	DRM_IVPU_PARAM_CONTEXT_BASE_ADDRESS   5
#define	DRM_IVPU_PARAM_CONTEXT_PRIORITY   6 /* Deprecated */
#define	DRM_IVPU_PARAM_CONTEXT_ID   7
#define	DRM_IVPU_PARAM_FW_API_VERSION   8
#define	DRM_IVPU_PARAM_ENGINE_HEARTBEAT   9
#define	DRM_IVPU_PARAM_UNIQUE_INFERENCE_ID   10
#define	DRM_IVPU_PARAM_TILE_CONFIG   11
#define	DRM_IVPU_PARAM_SKU   12
#define	DRM_IVPU_PARAM_CAPABILITIES   13
#define	DRM_IVPU_PARAM_PREEMPT_BUFFER_SIZE   14
#define	DRM_IVPU_PLATFORM_TYPE_SILICON   0
#define	DRM_IVPU_CONTEXT_PRIORITY_IDLE   0
#define	DRM_IVPU_CONTEXT_PRIORITY_NORMAL   1
#define	DRM_IVPU_CONTEXT_PRIORITY_FOCUS   2
#define	DRM_IVPU_CONTEXT_PRIORITY_REALTIME   3
#define	DRM_IVPU_JOB_PRIORITY_DEFAULT   0
#define	DRM_IVPU_JOB_PRIORITY_IDLE   1
#define	DRM_IVPU_JOB_PRIORITY_NORMAL   2
#define	DRM_IVPU_JOB_PRIORITY_FOCUS   3
#define	DRM_IVPU_JOB_PRIORITY_REALTIME   4
#define	DRM_IVPU_CAP_METRIC_STREAMER   1
#define	DRM_IVPU_CAP_DMA_MEMORY_RANGE   2
#define	DRM_IVPU_CAP_MANAGE_CMDQ   3
#define	DRM_IVPU_CAP_BO_CREATE_FROM_USERPTR   4
#define	DRM_IVPU_BO_SHAVE_MEM   0x00000001
#define	DRM_IVPU_BO_HIGH_MEM   DRM_IVPU_BO_SHAVE_MEM
#define	DRM_IVPU_BO_MAPPABLE   0x00000002
#define	DRM_IVPU_BO_DMA_MEM   0x00000004
#define	DRM_IVPU_BO_READ_ONLY   0x00000008
#define	DRM_IVPU_BO_CACHED   0x00000000
#define	DRM_IVPU_BO_UNCACHED   0x00010000
#define	DRM_IVPU_BO_WC   0x00020000
#define	DRM_IVPU_BO_CACHE_MASK   0x00030000
#define	DRM_IVPU_BO_FLAGS
#define	DRM_IVPU_ENGINE_COMPUTE   0
#define	DRM_IVPU_ENGINE_COPY   1 /* Deprecated */
#define	DRM_IVPU_JOB_STATUS_SUCCESS   0
#define	DRM_IVPU_JOB_STATUS_ABORTED   256
#define	DRM_IVPU_CMDQ_FLAG_TURBO   0x00000001

Macro Definition Documentation

DRM_IOCTL_IVPU_BO_CREATE

#define DRM_IOCTL_IVPU_BO_CREATE    DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_BO_CREATE, struct drm_ivpu_bo_create)

DRM_IOCTL_IVPU_BO_CREATE_FROM_USERPTR

#define DRM_IOCTL_IVPU_BO_CREATE_FROM_USERPTR

Value:

    DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_BO_CREATE_FROM_USERPTR, \
         struct drm_ivpu_bo_create_from_userptr)

DRM_IOCTL_IVPU_BO_INFO

#define DRM_IOCTL_IVPU_BO_INFO    DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_BO_INFO, struct drm_ivpu_bo_info)

DRM_IOCTL_IVPU_BO_WAIT

#define DRM_IOCTL_IVPU_BO_WAIT    DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_BO_WAIT, struct drm_ivpu_bo_wait)

DRM_IOCTL_IVPU_CMDQ_CREATE

#define DRM_IOCTL_IVPU_CMDQ_CREATE    DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_CMDQ_CREATE, struct drm_ivpu_cmdq_create)

DRM_IOCTL_IVPU_CMDQ_DESTROY

#define DRM_IOCTL_IVPU_CMDQ_DESTROY    DRM_IOW(DRM_COMMAND_BASE + DRM_IVPU_CMDQ_DESTROY, struct drm_ivpu_cmdq_destroy)

DRM_IOCTL_IVPU_CMDQ_SUBMIT

#define DRM_IOCTL_IVPU_CMDQ_SUBMIT    DRM_IOW(DRM_COMMAND_BASE + DRM_IVPU_CMDQ_SUBMIT, struct drm_ivpu_cmdq_submit)

DRM_IOCTL_IVPU_GET_PARAM

#define DRM_IOCTL_IVPU_GET_PARAM    DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_GET_PARAM, struct drm_ivpu_param)

DRM_IOCTL_IVPU_METRIC_STREAMER_GET_DATA

#define DRM_IOCTL_IVPU_METRIC_STREAMER_GET_DATA

Value:

    DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_METRIC_STREAMER_GET_DATA,         \
         struct drm_ivpu_metric_streamer_get_data)

DRM_IOCTL_IVPU_METRIC_STREAMER_GET_INFO

#define DRM_IOCTL_IVPU_METRIC_STREAMER_GET_INFO

Value:

    DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_METRIC_STREAMER_GET_INFO,         \
         struct drm_ivpu_metric_streamer_get_data)

DRM_IOCTL_IVPU_METRIC_STREAMER_START

#define DRM_IOCTL_IVPU_METRIC_STREAMER_START

Value:

    DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_METRIC_STREAMER_START,            \
         struct drm_ivpu_metric_streamer_start)

DRM_IOCTL_IVPU_METRIC_STREAMER_STOP

#define DRM_IOCTL_IVPU_METRIC_STREAMER_STOP

Value:

    DRM_IOW(DRM_COMMAND_BASE + DRM_IVPU_METRIC_STREAMER_STOP,              \
        struct drm_ivpu_metric_streamer_stop)

DRM_IOCTL_IVPU_SET_PARAM

#define DRM_IOCTL_IVPU_SET_PARAM    DRM_IOW(DRM_COMMAND_BASE + DRM_IVPU_SET_PARAM, struct drm_ivpu_param)

DRM_IOCTL_IVPU_SUBMIT

#define DRM_IOCTL_IVPU_SUBMIT    DRM_IOW(DRM_COMMAND_BASE + DRM_IVPU_SUBMIT, struct drm_ivpu_submit)

DRM_IVPU_BO_CACHE_MASK

#define DRM_IVPU_BO_CACHE_MASK   0x00030000

DRM_IVPU_BO_CACHED

#define DRM_IVPU_BO_CACHED   0x00000000

DRM_IVPU_BO_CREATE

#define DRM_IVPU_BO_CREATE   0x02

DRM_IVPU_BO_CREATE_FROM_USERPTR

#define DRM_IVPU_BO_CREATE_FROM_USERPTR   0x0e

DRM_IVPU_BO_DMA_MEM

#define DRM_IVPU_BO_DMA_MEM   0x00000004

DRM_IVPU_BO_FLAGS

#define DRM_IVPU_BO_FLAGS

Value:

    (DRM_IVPU_BO_HIGH_MEM | \
     DRM_IVPU_BO_MAPPABLE | \
     DRM_IVPU_BO_DMA_MEM | \
     DRM_IVPU_BO_READ_ONLY | \
     DRM_IVPU_BO_CACHE_MASK)

DRM_IVPU_BO_HIGH_MEM

#define DRM_IVPU_BO_HIGH_MEM   DRM_IVPU_BO_SHAVE_MEM

DRM_IVPU_BO_INFO

#define DRM_IVPU_BO_INFO   0x03

DRM_IVPU_BO_MAPPABLE

#define DRM_IVPU_BO_MAPPABLE   0x00000002

DRM_IVPU_BO_READ_ONLY

#define DRM_IVPU_BO_READ_ONLY   0x00000008

DRM_IVPU_BO_SHAVE_MEM

#define DRM_IVPU_BO_SHAVE_MEM   0x00000001

DRM_IVPU_BO_UNCACHED

#define DRM_IVPU_BO_UNCACHED   0x00010000

DRM_IVPU_BO_WAIT

#define DRM_IVPU_BO_WAIT   0x06

DRM_IVPU_BO_WC

#define DRM_IVPU_BO_WC   0x00020000

DRM_IVPU_CAP_BO_CREATE_FROM_USERPTR

#define DRM_IVPU_CAP_BO_CREATE_FROM_USERPTR   4

DRM_IVPU_CAP_BO_CREATE_FROM_USERPTR

Driver supports creating buffer objects from user space memory pointers. This allows creating GEM buffers from existing user memory regions.

DRM_IVPU_CAP_DMA_MEMORY_RANGE

#define DRM_IVPU_CAP_DMA_MEMORY_RANGE   2

DRM_IVPU_CAP_DMA_MEMORY_RANGE

Driver has capability to allocate separate memory range accessible by hardware DMA.

DRM_IVPU_CAP_MANAGE_CMDQ

#define DRM_IVPU_CAP_MANAGE_CMDQ   3

DRM_IVPU_CAP_MANAGE_CMDQ

Driver supports explicit command queue operations like command queue create, command queue destroy and submit job on specific command queue.

DRM_IVPU_CAP_METRIC_STREAMER

#define DRM_IVPU_CAP_METRIC_STREAMER   1

DRM_IVPU_CAP_METRIC_STREAMER

Metric streamer support. Provides sampling of various hardware performance metrics like DMA bandwidth and cache miss/hits. Can be used for profiling.

DRM_IVPU_CMDQ_CREATE

#define DRM_IVPU_CMDQ_CREATE   0x0b

DRM_IVPU_CMDQ_DESTROY

#define DRM_IVPU_CMDQ_DESTROY   0x0c

DRM_IVPU_CMDQ_FLAG_TURBO

#define DRM_IVPU_CMDQ_FLAG_TURBO   0x00000001

DRM_IVPU_CMDQ_SUBMIT

#define DRM_IVPU_CMDQ_SUBMIT   0x0d

DRM_IVPU_CONTEXT_PRIORITY_FOCUS

#define DRM_IVPU_CONTEXT_PRIORITY_FOCUS   2

DRM_IVPU_CONTEXT_PRIORITY_IDLE

#define DRM_IVPU_CONTEXT_PRIORITY_IDLE   0

DRM_IVPU_CONTEXT_PRIORITY_NORMAL

#define DRM_IVPU_CONTEXT_PRIORITY_NORMAL   1

DRM_IVPU_CONTEXT_PRIORITY_REALTIME

#define DRM_IVPU_CONTEXT_PRIORITY_REALTIME   3

DRM_IVPU_ENGINE_COMPUTE

#define DRM_IVPU_ENGINE_COMPUTE   0

DRM_IVPU_ENGINE_COPY

#define DRM_IVPU_ENGINE_COPY   1 /* Deprecated */

DRM_IVPU_GET_PARAM

#define DRM_IVPU_GET_PARAM   0x00

DRM_IVPU_JOB_PRIORITY_DEFAULT

#define DRM_IVPU_JOB_PRIORITY_DEFAULT   0

DRM_IVPU_JOB_PRIORITY_FOCUS

#define DRM_IVPU_JOB_PRIORITY_FOCUS   3

DRM_IVPU_JOB_PRIORITY_IDLE

#define DRM_IVPU_JOB_PRIORITY_IDLE   1

DRM_IVPU_JOB_PRIORITY_NORMAL

#define DRM_IVPU_JOB_PRIORITY_NORMAL   2

DRM_IVPU_JOB_PRIORITY_REALTIME

#define DRM_IVPU_JOB_PRIORITY_REALTIME   4

DRM_IVPU_JOB_STATUS_ABORTED

#define DRM_IVPU_JOB_STATUS_ABORTED   256

DRM_IVPU_JOB_STATUS_SUCCESS

#define DRM_IVPU_JOB_STATUS_SUCCESS   0

DRM_IVPU_METRIC_STREAMER_GET_DATA

#define DRM_IVPU_METRIC_STREAMER_GET_DATA   0x09

DRM_IVPU_METRIC_STREAMER_GET_INFO

#define DRM_IVPU_METRIC_STREAMER_GET_INFO   0x0a

DRM_IVPU_METRIC_STREAMER_START

#define DRM_IVPU_METRIC_STREAMER_START   0x07

DRM_IVPU_METRIC_STREAMER_STOP

#define DRM_IVPU_METRIC_STREAMER_STOP   0x08

DRM_IVPU_PARAM_CAPABILITIES

#define DRM_IVPU_PARAM_CAPABILITIES   13

DRM_IVPU_PARAM_CONTEXT_BASE_ADDRESS

#define DRM_IVPU_PARAM_CONTEXT_BASE_ADDRESS   5

DRM_IVPU_PARAM_CONTEXT_ID

#define DRM_IVPU_PARAM_CONTEXT_ID   7

DRM_IVPU_PARAM_CONTEXT_PRIORITY

#define DRM_IVPU_PARAM_CONTEXT_PRIORITY   6 /* Deprecated */

DRM_IVPU_PARAM_CORE_CLOCK_RATE

#define DRM_IVPU_PARAM_CORE_CLOCK_RATE   3

DRM_IVPU_PARAM_DEVICE_ID

#define DRM_IVPU_PARAM_DEVICE_ID   0

DOC: contexts

VPU contexts have private virtual address space, job queues and priority. Each context is identified by an unique ID. Context is created on open().

DRM_IVPU_PARAM_DEVICE_REVISION

#define DRM_IVPU_PARAM_DEVICE_REVISION   1

DRM_IVPU_PARAM_ENGINE_HEARTBEAT

#define DRM_IVPU_PARAM_ENGINE_HEARTBEAT   9

DRM_IVPU_PARAM_FW_API_VERSION

#define DRM_IVPU_PARAM_FW_API_VERSION   8

DRM_IVPU_PARAM_NUM_CONTEXTS

#define DRM_IVPU_PARAM_NUM_CONTEXTS   4

DRM_IVPU_PARAM_PLATFORM_TYPE

#define DRM_IVPU_PARAM_PLATFORM_TYPE   2

DRM_IVPU_PARAM_PREEMPT_BUFFER_SIZE

#define DRM_IVPU_PARAM_PREEMPT_BUFFER_SIZE   14

DRM_IVPU_PARAM_SKU

#define DRM_IVPU_PARAM_SKU   12

DRM_IVPU_PARAM_TILE_CONFIG

#define DRM_IVPU_PARAM_TILE_CONFIG   11

DRM_IVPU_PARAM_UNIQUE_INFERENCE_ID

#define DRM_IVPU_PARAM_UNIQUE_INFERENCE_ID   10

DRM_IVPU_PLATFORM_TYPE_SILICON

#define DRM_IVPU_PLATFORM_TYPE_SILICON   0

DRM_IVPU_SET_PARAM

#define DRM_IVPU_SET_PARAM   0x01

DRM_IVPU_SUBMIT

#define DRM_IVPU_SUBMIT   0x05