#include "uspi/lan7800.h"
#include "uspi/usbhostcontroller.h"
#include "uspi/devicenameservice.h"
#include "uspi/util.h"
#include "uspi/assert.h"
#include "uspios.h"
#include <Drivers/uart.h>

Include dependency graph for lan7800.c:

Macros
#define	HS_USB_PKT_SIZE 512

#define	MAX_RX_FIFO_SIZE (12 * 1024)

#define	MAX_TX_FIFO_SIZE (12 * 1024)

#define	DEFAULT_BURST_CAP_SIZE MAX_TX_FIFO_SIZE

#define	DEFAULT_BULK_IN_DELAY 0x800

#define	RX_HEADER_SIZE (4 + 4 + 2)

#define	TX_HEADER_SIZE (4 + 4)

#define	MAX_RX_FRAME_SIZE (2*6 + 2 + 1500 + 4)

#define	WRITE_REGISTER 0xA0

#define	READ_REGISTER 0xA1

#define	ID_REV 0x000

#define	ID_REV_CHIP_ID_MASK 0xFFFF0000

#define	ID_REV_CHIP_ID_7800 0x7800

#define	INT_STS 0x00C

#define	INT_STS_CLEAR_ALL 0xFFFFFFFF

#define	HW_CFG 0x010

#define	HW_CFG_CLK125_EN 0x02000000

#define	HW_CFG_REFCLK25_EN 0x01000000

#define	HW_CFG_LED3_EN 0x00800000

#define	HW_CFG_LED2_EN 0x00400000

#define	HW_CFG_LED1_EN 0x00200000

#define	HW_CFG_LED0_EN 0x00100000

#define	HW_CFG_EEE_PHY_LUSU 0x00020000

#define	HW_CFG_EEE_TSU 0x00010000

#define	HW_CFG_NETDET_STS 0x00008000

#define	HW_CFG_NETDET_EN 0x00004000

#define	HW_CFG_EEM 0x00002000

#define	HW_CFG_RST_PROTECT 0x00001000

#define	HW_CFG_CONNECT_BUF 0x00000400

#define	HW_CFG_CONNECT_EN 0x00000200

#define	HW_CFG_CONNECT_POL 0x00000100

#define	HW_CFG_SUSPEND_N_SEL_MASK 0x000000C0

#define	HW_CFG_SUSPEND_N_SEL_2 0x00000000

#define	HW_CFG_SUSPEND_N_SEL_12N 0x00000040

#define	HW_CFG_SUSPEND_N_SEL_012N 0x00000080

#define	HW_CFG_SUSPEND_N_SEL_0123N 0x000000C0

#define	HW_CFG_SUSPEND_N_POL 0x00000020

#define	HW_CFG_MEF 0x00000010

#define	HW_CFG_ETC 0x00000008

#define	HW_CFG_LRST 0x00000002

#define	HW_CFG_SRST 0x00000001

#define	PMT_CTL 0x014

#define	PMT_CTL_EEE_WAKEUP_EN 0x00002000

#define	PMT_CTL_EEE_WUPS 0x00001000

#define	PMT_CTL_MAC_SRST 0x00000800

#define	PMT_CTL_PHY_PWRUP 0x00000400

#define	PMT_CTL_RES_CLR_WKP_MASK 0x00000300

#define	PMT_CTL_RES_CLR_WKP_STS 0x00000200

#define	PMT_CTL_RES_CLR_WKP_EN 0x00000100

#define	PMT_CTL_READY 0x00000080

#define	PMT_CTL_SUS_MODE_MASK 0x00000060

#define	PMT_CTL_SUS_MODE_0 0x00000000

#define	PMT_CTL_SUS_MODE_1 0x00000020

#define	PMT_CTL_SUS_MODE_2 0x00000040

#define	PMT_CTL_SUS_MODE_3 0x00000060

#define	PMT_CTL_PHY_RST 0x00000010

#define	PMT_CTL_WOL_EN 0x00000008

#define	PMT_CTL_PHY_WAKE_EN 0x00000004

#define	PMT_CTL_WUPS_MASK 0x00000003

#define	PMT_CTL_WUPS_MLT 0x00000003

#define	PMT_CTL_WUPS_MAC 0x00000002

#define	PMT_CTL_WUPS_PHY 0x00000001

#define	USB_CFG0 0x080

#define	USB_CFG_BIR 0x00000040

#define	USB_CFG_BCE 0x00000020

#define	BURST_CAP 0x090

#define	BURST_CAP_SIZE_MASK_ 0x000000FF

#define	BULK_IN_DLY 0x094

#define	BULK_IN_DLY_MASK_ 0x0000FFFF

#define	INT_EP_CTL 0x098

#define	INT_EP_INTEP_ON 0x80000000

#define	INT_STS_EEE_TX_LPI_STRT_EN 0x04000000

#define	INT_STS_EEE_TX_LPI_STOP_EN 0x02000000

#define	INT_STS_EEE_RX_LPI_EN 0x01000000

#define	INT_EP_RDFO_EN 0x00400000

#define	INT_EP_TXE_EN 0x00200000

#define	INT_EP_TX_DIS_EN 0x00080000

#define	INT_EP_RX_DIS_EN 0x00040000

#define	INT_EP_PHY_INT_EN 0x00020000

#define	INT_EP_DP_INT_EN 0x00010000

#define	INT_EP_MAC_ERR_EN 0x00008000

#define	INT_EP_TDFU_EN 0x00004000

#define	INT_EP_TDFO_EN 0x00002000

#define	INT_EP_UTX_FP_EN 0x00001000

#define	INT_EP_GPIO_EN_MASK 0x00000FFF

#define	RFE_CTL 0x0B0

#define	RFE_CTL_IGMP_COE 0x00004000

#define	RFE_CTL_ICMP_COE 0x00002000

#define	RFE_CTL_TCPUDP_COE 0x00001000

#define	RFE_CTL_IP_COE 0x00000800

#define	RFE_CTL_BCAST_EN 0x00000400

#define	RFE_CTL_MCAST_EN 0x00000200

#define	RFE_CTL_UCAST_EN 0x00000100

#define	RFE_CTL_VLAN_STRIP 0x00000080

#define	RFE_CTL_DISCARD_UNTAGGED 0x00000040

#define	RFE_CTL_VLAN_FILTER 0x00000020

#define	RFE_CTL_SA_FILTER 0x00000010

#define	RFE_CTL_MCAST_HASH 0x00000008

#define	RFE_CTL_DA_HASH 0x00000004

#define	RFE_CTL_DA_PERFECT 0x00000002

#define	RFE_CTL_RST 0x00000001

#define	FCT_RX_CTL 0x0C0

#define	FCT_RX_CTL_EN 0x80000000

#define	FCT_RX_CTL_RST 0x40000000

#define	FCT_RX_CTL_SBF 0x02000000

#define	FCT_RX_CTL_OVFL 0x01000000

#define	FCT_RX_CTL_DROP 0x00800000

#define	FCT_RX_CTL_NOT_EMPTY 0x00400000

#define	FCT_RX_CTL_EMPTY 0x00200000

#define	FCT_RX_CTL_DIS 0x00100000

#define	FCT_RX_CTL_USED_MASK 0x0000FFFF

#define	FCT_TX_CTL 0x0C4

#define	FCT_TX_CTL_EN 0x80000000

#define	FCT_TX_CTL_RST 0x40000000

#define	FCT_TX_CTL_NOT_EMPTY 0x00400000

#define	FCT_TX_CTL_EMPTY 0x00200000

#define	FCT_TX_CTL_DIS 0x00100000

#define	FCT_TX_CTL_USED_MASK 0x0000FFFF

#define	FCT_RX_FIFO_END 0x0C8

#define	FCT_RX_FIFO_END_MASK 0x0000007F

#define	FCT_TX_FIFO_END 0x0CC

#define	FCT_TX_FIFO_END_MASK 0x0000003F

#define	FCT_FLOW 0x0D0

#define	MAC_CR 0x100

#define	MAC_CR_GMII_EN 0x00080000

#define	MAC_CR_EEE_TX_CLK_STOP_EN 0x00040000

#define	MAC_CR_EEE_EN 0x00020000

#define	MAC_CR_EEE_TLAR_EN 0x00010000

#define	MAC_CR_ADP 0x00002000

#define	MAC_CR_AUTO_DUPLEX 0x00001000

#define	MAC_CR_AUTO_SPEED 0x00000800

#define	MAC_CR_LOOPBACK 0x00000400

#define	MAC_CR_BOLMT_MASK 0x000000C0

#define	MAC_CR_FULL_DUPLEX 0x00000008

#define	MAC_CR_SPEED_MASK 0x00000006

#define	MAC_CR_SPEED_1000 0x00000004

#define	MAC_CR_SPEED_100 0x00000002

#define	MAC_CR_SPEED_10 0x00000000

#define	MAC_CR_RST 0x00000001

#define	MAC_RX 0x104

#define	MAC_RX_MAX_SIZE_SHIFT 16

#define	MAC_RX_MAX_SIZE_MASK 0x3FFF0000

#define	MAC_RX_FCS_STRIP 0x00000010

#define	MAC_RX_VLAN_FSE 0x00000004

#define	MAC_RX_RXD 0x00000002

#define	MAC_RX_RXEN 0x00000001

#define	MAC_TX 0x108

#define	MAC_TX_BAD_FCS 0x00000004

#define	MAC_TX_TXD 0x00000002

#define	MAC_TX_TXEN 0x00000001

#define	FLOW 0x10C

#define	RX_ADDRH 0x118

#define	RX_ADDRH_MASK_ 0x0000FFFF

#define	RX_ADDRL 0x11C

#define	RX_ADDRL_MASK_ 0xFFFFFFFF

#define	MII_ACC 0x120

#define	MII_ACC_PHY_ADDR_SHIFT 11

#define	MII_ACC_PHY_ADDR_MASK 0x0000F800

#define	PHY_ADDRESS 1

#define	MII_ACC_MIIRINDA_SHIFT 6

#define	MII_ACC_MIIRINDA_MASK 0x000007C0

#define	MII_ACC_MII_READ 0x00000000

#define	MII_ACC_MII_WRITE 0x00000002

#define	MII_ACC_MII_BUSY 0x00000001

#define	MII_DATA 0x124

#define	MII_DATA_MASK 0x0000FFFF

#define	MAF_BASE 0x400

#define	MAF_HIX 0x00

#define	MAF_LOX 0x04

#define	NUM_OF_MAF 33

#define	MAF_HI_BEGIN (MAF_BASE + MAF_HIX)

#define	MAF_LO_BEGIN (MAF_BASE + MAF_LOX)

#define	MAF_HI(index) (MAF_BASE + (8 * (index)) + (MAF_HIX))

#define	MAF_LO(index) (MAF_BASE + (8 * (index)) + (MAF_LOX))

#define	MAF_HI_VALID 0x80000000

#define	MAF_HI_TYPE_MASK 0x40000000

#define	MAF_HI_TYPE_SRC 0x40000000

#define	MAF_HI_TYPE_DST 0x00000000

#define	MAF_HI_ADDR_MASK 0x0000FFFF

#define	MAF_LO_ADDR_MASK 0xFFFFFFFF

#define	TX_CMD_A_FCS 0x00400000

#define	TX_CMD_A_LEN_MASK 0x000FFFFF

#define	RX_CMD_A_RED 0x00400000

#define	RX_CMD_A_LEN_MASK 0x00003FFF

Functions
boolean	LAN7800DeviceInitMACAddress (TLAN7800Device *pThis)

boolean	LAN7800DeviceInitPHY (TLAN7800Device *pThis)

boolean	LAN7800DevicePHYWrite (TLAN7800Device *pThis, u8 uchIndex, u16 usValue)

boolean	LAN7800DevicePHYRead (TLAN7800Device pThis, u8 uchIndex, u16 pValue)

boolean	LAN7800DeviceWaitReg (TLAN7800Device *pThis, u32 nIndex, u32 nMask, u32 nCompare)

boolean	LAN7800DeviceReadWriteReg (TLAN7800Device *pThis, u32 nIndex, u32 nOrMask, u32 nAndMask)

boolean	LAN7800DeviceWriteReg (TLAN7800Device *pThis, u32 nIndex, u32 nValue)

boolean	LAN7800DeviceReadReg (TLAN7800Device pThis, u32 nIndex, u32 pValue)

void	LAN7800Device (TLAN7800Device pThis, TUSBFunction pFunction)

void	_LAN7800Device (TLAN7800Device *pThis)

boolean	LAN7800DeviceConfigure (TUSBFunction *pUSBFunction)

TMACAddress *	LAN7800DeviceGetMACAddress (TLAN7800Device *pThis)

boolean	LAN7800DeviceSendFrame (TLAN7800Device pThis, const void pBuffer, unsigned nLength)

boolean	LAN7800DeviceReceiveFrame (TLAN7800Device pThis, void pBuffer, unsigned *pResultLength)

boolean	LAN7800DeviceIsLinkUp (TLAN7800Device *pThis)

Macro Definition Documentation

◆ BULK_IN_DLY

#define BULK_IN_DLY 0x094

◆ BULK_IN_DLY_MASK_

#define BULK_IN_DLY_MASK_ 0x0000FFFF

◆ BURST_CAP

#define BURST_CAP 0x090

◆ BURST_CAP_SIZE_MASK_

#define BURST_CAP_SIZE_MASK_ 0x000000FF

◆ DEFAULT_BULK_IN_DELAY

#define DEFAULT_BULK_IN_DELAY 0x800

◆ DEFAULT_BURST_CAP_SIZE

#define DEFAULT_BURST_CAP_SIZE MAX_TX_FIFO_SIZE

◆ FCT_FLOW

#define FCT_FLOW 0x0D0

◆ FCT_RX_CTL

#define FCT_RX_CTL 0x0C0

◆ FCT_RX_CTL_DIS

#define FCT_RX_CTL_DIS 0x00100000

◆ FCT_RX_CTL_DROP

#define FCT_RX_CTL_DROP 0x00800000

◆ FCT_RX_CTL_EMPTY

#define FCT_RX_CTL_EMPTY 0x00200000

◆ FCT_RX_CTL_EN

#define FCT_RX_CTL_EN 0x80000000

◆ FCT_RX_CTL_NOT_EMPTY

#define FCT_RX_CTL_NOT_EMPTY 0x00400000

◆ FCT_RX_CTL_OVFL

#define FCT_RX_CTL_OVFL 0x01000000

◆ FCT_RX_CTL_RST

#define FCT_RX_CTL_RST 0x40000000

◆ FCT_RX_CTL_SBF

#define FCT_RX_CTL_SBF 0x02000000

◆ FCT_RX_CTL_USED_MASK

#define FCT_RX_CTL_USED_MASK 0x0000FFFF

◆ FCT_RX_FIFO_END

#define FCT_RX_FIFO_END 0x0C8

◆ FCT_RX_FIFO_END_MASK

#define FCT_RX_FIFO_END_MASK 0x0000007F

◆ FCT_TX_CTL

#define FCT_TX_CTL 0x0C4

◆ FCT_TX_CTL_DIS

#define FCT_TX_CTL_DIS 0x00100000

◆ FCT_TX_CTL_EMPTY

#define FCT_TX_CTL_EMPTY 0x00200000

◆ FCT_TX_CTL_EN

#define FCT_TX_CTL_EN 0x80000000

◆ FCT_TX_CTL_NOT_EMPTY

#define FCT_TX_CTL_NOT_EMPTY 0x00400000

◆ FCT_TX_CTL_RST

#define FCT_TX_CTL_RST 0x40000000

◆ FCT_TX_CTL_USED_MASK

#define FCT_TX_CTL_USED_MASK 0x0000FFFF

◆ FCT_TX_FIFO_END

#define FCT_TX_FIFO_END 0x0CC

◆ FCT_TX_FIFO_END_MASK

#define FCT_TX_FIFO_END_MASK 0x0000003F

◆ FLOW

#define FLOW 0x10C

◆ HS_USB_PKT_SIZE

#define HS_USB_PKT_SIZE 512

◆ HW_CFG

#define HW_CFG 0x010

◆ HW_CFG_CLK125_EN

#define HW_CFG_CLK125_EN 0x02000000

◆ HW_CFG_CONNECT_BUF

#define HW_CFG_CONNECT_BUF 0x00000400

◆ HW_CFG_CONNECT_EN

#define HW_CFG_CONNECT_EN 0x00000200

◆ HW_CFG_CONNECT_POL

#define HW_CFG_CONNECT_POL 0x00000100

◆ HW_CFG_EEE_PHY_LUSU

#define HW_CFG_EEE_PHY_LUSU 0x00020000

◆ HW_CFG_EEE_TSU

#define HW_CFG_EEE_TSU 0x00010000

◆ HW_CFG_EEM

#define HW_CFG_EEM 0x00002000

◆ HW_CFG_ETC

#define HW_CFG_ETC 0x00000008

◆ HW_CFG_LED0_EN

#define HW_CFG_LED0_EN 0x00100000

◆ HW_CFG_LED1_EN

#define HW_CFG_LED1_EN 0x00200000

◆ HW_CFG_LED2_EN

#define HW_CFG_LED2_EN 0x00400000

◆ HW_CFG_LED3_EN

#define HW_CFG_LED3_EN 0x00800000

◆ HW_CFG_LRST

#define HW_CFG_LRST 0x00000002

◆ HW_CFG_MEF

#define HW_CFG_MEF 0x00000010

◆ HW_CFG_NETDET_EN

#define HW_CFG_NETDET_EN 0x00004000

◆ HW_CFG_NETDET_STS

#define HW_CFG_NETDET_STS 0x00008000

◆ HW_CFG_REFCLK25_EN

#define HW_CFG_REFCLK25_EN 0x01000000

◆ HW_CFG_RST_PROTECT

#define HW_CFG_RST_PROTECT 0x00001000

◆ HW_CFG_SRST

#define HW_CFG_SRST 0x00000001

◆ HW_CFG_SUSPEND_N_POL

#define HW_CFG_SUSPEND_N_POL 0x00000020

◆ HW_CFG_SUSPEND_N_SEL_0123N

#define HW_CFG_SUSPEND_N_SEL_0123N 0x000000C0

◆ HW_CFG_SUSPEND_N_SEL_012N

#define HW_CFG_SUSPEND_N_SEL_012N 0x00000080

◆ HW_CFG_SUSPEND_N_SEL_12N

#define HW_CFG_SUSPEND_N_SEL_12N 0x00000040

◆ HW_CFG_SUSPEND_N_SEL_2

#define HW_CFG_SUSPEND_N_SEL_2 0x00000000

◆ HW_CFG_SUSPEND_N_SEL_MASK

#define HW_CFG_SUSPEND_N_SEL_MASK 0x000000C0

◆ ID_REV

#define ID_REV 0x000

◆ ID_REV_CHIP_ID_7800

#define ID_REV_CHIP_ID_7800 0x7800

◆ ID_REV_CHIP_ID_MASK

#define ID_REV_CHIP_ID_MASK 0xFFFF0000

◆ INT_EP_CTL

#define INT_EP_CTL 0x098

◆ INT_EP_DP_INT_EN

#define INT_EP_DP_INT_EN 0x00010000

◆ INT_EP_GPIO_EN_MASK

#define INT_EP_GPIO_EN_MASK 0x00000FFF

◆ INT_EP_INTEP_ON

#define INT_EP_INTEP_ON 0x80000000

◆ INT_EP_MAC_ERR_EN

#define INT_EP_MAC_ERR_EN 0x00008000

◆ INT_EP_PHY_INT_EN

#define INT_EP_PHY_INT_EN 0x00020000

◆ INT_EP_RDFO_EN

#define INT_EP_RDFO_EN 0x00400000

◆ INT_EP_RX_DIS_EN

#define INT_EP_RX_DIS_EN 0x00040000

◆ INT_EP_TDFO_EN

#define INT_EP_TDFO_EN 0x00002000

◆ INT_EP_TDFU_EN

#define INT_EP_TDFU_EN 0x00004000

◆ INT_EP_TX_DIS_EN

#define INT_EP_TX_DIS_EN 0x00080000

◆ INT_EP_TXE_EN

#define INT_EP_TXE_EN 0x00200000

◆ INT_EP_UTX_FP_EN

#define INT_EP_UTX_FP_EN 0x00001000

◆ INT_STS

#define INT_STS 0x00C

◆ INT_STS_CLEAR_ALL

#define INT_STS_CLEAR_ALL 0xFFFFFFFF

◆ INT_STS_EEE_RX_LPI_EN

#define INT_STS_EEE_RX_LPI_EN 0x01000000

◆ INT_STS_EEE_TX_LPI_STOP_EN

#define INT_STS_EEE_TX_LPI_STOP_EN 0x02000000

◆ INT_STS_EEE_TX_LPI_STRT_EN

#define INT_STS_EEE_TX_LPI_STRT_EN 0x04000000

◆ MAC_CR

#define MAC_CR 0x100

◆ MAC_CR_ADP

#define MAC_CR_ADP 0x00002000

◆ MAC_CR_AUTO_DUPLEX

#define MAC_CR_AUTO_DUPLEX 0x00001000

◆ MAC_CR_AUTO_SPEED

#define MAC_CR_AUTO_SPEED 0x00000800

◆ MAC_CR_BOLMT_MASK

#define MAC_CR_BOLMT_MASK 0x000000C0

◆ MAC_CR_EEE_EN

#define MAC_CR_EEE_EN 0x00020000

◆ MAC_CR_EEE_TLAR_EN

#define MAC_CR_EEE_TLAR_EN 0x00010000

◆ MAC_CR_EEE_TX_CLK_STOP_EN

#define MAC_CR_EEE_TX_CLK_STOP_EN 0x00040000

◆ MAC_CR_FULL_DUPLEX

#define MAC_CR_FULL_DUPLEX 0x00000008

◆ MAC_CR_GMII_EN

#define MAC_CR_GMII_EN 0x00080000

◆ MAC_CR_LOOPBACK

#define MAC_CR_LOOPBACK 0x00000400

◆ MAC_CR_RST

#define MAC_CR_RST 0x00000001

◆ MAC_CR_SPEED_10

#define MAC_CR_SPEED_10 0x00000000

◆ MAC_CR_SPEED_100

#define MAC_CR_SPEED_100 0x00000002

◆ MAC_CR_SPEED_1000

#define MAC_CR_SPEED_1000 0x00000004

◆ MAC_CR_SPEED_MASK

#define MAC_CR_SPEED_MASK 0x00000006

◆ MAC_RX

#define MAC_RX 0x104

◆ MAC_RX_FCS_STRIP

#define MAC_RX_FCS_STRIP 0x00000010

◆ MAC_RX_MAX_SIZE_MASK

#define MAC_RX_MAX_SIZE_MASK 0x3FFF0000

◆ MAC_RX_MAX_SIZE_SHIFT

#define MAC_RX_MAX_SIZE_SHIFT 16

◆ MAC_RX_RXD

#define MAC_RX_RXD 0x00000002

◆ MAC_RX_RXEN

#define MAC_RX_RXEN 0x00000001

◆ MAC_RX_VLAN_FSE

#define MAC_RX_VLAN_FSE 0x00000004

◆ MAC_TX

#define MAC_TX 0x108

◆ MAC_TX_BAD_FCS

#define MAC_TX_BAD_FCS 0x00000004

◆ MAC_TX_TXD

#define MAC_TX_TXD 0x00000002

◆ MAC_TX_TXEN

#define MAC_TX_TXEN 0x00000001

◆ MAF_BASE

#define MAF_BASE 0x400

◆ MAF_HI

#define MAF_HI ( index ) (MAF_BASE + (8 * (index)) + (MAF_HIX))

◆ MAF_HI_ADDR_MASK

#define MAF_HI_ADDR_MASK 0x0000FFFF

◆ MAF_HI_BEGIN

#define MAF_HI_BEGIN (MAF_BASE + MAF_HIX)

◆ MAF_HI_TYPE_DST

#define MAF_HI_TYPE_DST 0x00000000

◆ MAF_HI_TYPE_MASK

#define MAF_HI_TYPE_MASK 0x40000000

◆ MAF_HI_TYPE_SRC

#define MAF_HI_TYPE_SRC 0x40000000

◆ MAF_HI_VALID

#define MAF_HI_VALID 0x80000000

◆ MAF_HIX

#define MAF_HIX 0x00

◆ MAF_LO

#define MAF_LO ( index ) (MAF_BASE + (8 * (index)) + (MAF_LOX))

◆ MAF_LO_ADDR_MASK

#define MAF_LO_ADDR_MASK 0xFFFFFFFF

◆ MAF_LO_BEGIN

#define MAF_LO_BEGIN (MAF_BASE + MAF_LOX)

◆ MAF_LOX

#define MAF_LOX 0x04

◆ MAX_RX_FIFO_SIZE

#define MAX_RX_FIFO_SIZE (12 * 1024)

◆ MAX_RX_FRAME_SIZE

#define MAX_RX_FRAME_SIZE (2*6 + 2 + 1500 + 4)

◆ MAX_TX_FIFO_SIZE

#define MAX_TX_FIFO_SIZE (12 * 1024)

◆ MII_ACC

#define MII_ACC 0x120

◆ MII_ACC_MII_BUSY

#define MII_ACC_MII_BUSY 0x00000001

◆ MII_ACC_MII_READ

#define MII_ACC_MII_READ 0x00000000

◆ MII_ACC_MII_WRITE

#define MII_ACC_MII_WRITE 0x00000002

◆ MII_ACC_MIIRINDA_MASK

#define MII_ACC_MIIRINDA_MASK 0x000007C0

◆ MII_ACC_MIIRINDA_SHIFT

#define MII_ACC_MIIRINDA_SHIFT 6

◆ MII_ACC_PHY_ADDR_MASK

#define MII_ACC_PHY_ADDR_MASK 0x0000F800

◆ MII_ACC_PHY_ADDR_SHIFT

#define MII_ACC_PHY_ADDR_SHIFT 11

◆ MII_DATA

#define MII_DATA 0x124

◆ MII_DATA_MASK

#define MII_DATA_MASK 0x0000FFFF

◆ NUM_OF_MAF

#define NUM_OF_MAF 33

◆ PHY_ADDRESS

#define PHY_ADDRESS 1

◆ PMT_CTL

#define PMT_CTL 0x014

◆ PMT_CTL_EEE_WAKEUP_EN

#define PMT_CTL_EEE_WAKEUP_EN 0x00002000

◆ PMT_CTL_EEE_WUPS

#define PMT_CTL_EEE_WUPS 0x00001000

◆ PMT_CTL_MAC_SRST

#define PMT_CTL_MAC_SRST 0x00000800

◆ PMT_CTL_PHY_PWRUP

#define PMT_CTL_PHY_PWRUP 0x00000400

◆ PMT_CTL_PHY_RST

#define PMT_CTL_PHY_RST 0x00000010

◆ PMT_CTL_PHY_WAKE_EN

#define PMT_CTL_PHY_WAKE_EN 0x00000004

◆ PMT_CTL_READY

#define PMT_CTL_READY 0x00000080

◆ PMT_CTL_RES_CLR_WKP_EN

#define PMT_CTL_RES_CLR_WKP_EN 0x00000100

◆ PMT_CTL_RES_CLR_WKP_MASK

#define PMT_CTL_RES_CLR_WKP_MASK 0x00000300

◆ PMT_CTL_RES_CLR_WKP_STS

#define PMT_CTL_RES_CLR_WKP_STS 0x00000200

◆ PMT_CTL_SUS_MODE_0

#define PMT_CTL_SUS_MODE_0 0x00000000

◆ PMT_CTL_SUS_MODE_1

#define PMT_CTL_SUS_MODE_1 0x00000020

◆ PMT_CTL_SUS_MODE_2

#define PMT_CTL_SUS_MODE_2 0x00000040

◆ PMT_CTL_SUS_MODE_3

#define PMT_CTL_SUS_MODE_3 0x00000060

◆ PMT_CTL_SUS_MODE_MASK

#define PMT_CTL_SUS_MODE_MASK 0x00000060

◆ PMT_CTL_WOL_EN

#define PMT_CTL_WOL_EN 0x00000008

◆ PMT_CTL_WUPS_MAC

#define PMT_CTL_WUPS_MAC 0x00000002

◆ PMT_CTL_WUPS_MASK

#define PMT_CTL_WUPS_MASK 0x00000003

◆ PMT_CTL_WUPS_MLT

#define PMT_CTL_WUPS_MLT 0x00000003

◆ PMT_CTL_WUPS_PHY

#define PMT_CTL_WUPS_PHY 0x00000001

◆ READ_REGISTER

#define READ_REGISTER 0xA1

◆ RFE_CTL

#define RFE_CTL 0x0B0

◆ RFE_CTL_BCAST_EN

#define RFE_CTL_BCAST_EN 0x00000400

◆ RFE_CTL_DA_HASH

#define RFE_CTL_DA_HASH 0x00000004

◆ RFE_CTL_DA_PERFECT

#define RFE_CTL_DA_PERFECT 0x00000002

◆ RFE_CTL_DISCARD_UNTAGGED

#define RFE_CTL_DISCARD_UNTAGGED 0x00000040

◆ RFE_CTL_ICMP_COE

#define RFE_CTL_ICMP_COE 0x00002000

◆ RFE_CTL_IGMP_COE

#define RFE_CTL_IGMP_COE 0x00004000

◆ RFE_CTL_IP_COE

#define RFE_CTL_IP_COE 0x00000800

◆ RFE_CTL_MCAST_EN

#define RFE_CTL_MCAST_EN 0x00000200

◆ RFE_CTL_MCAST_HASH

#define RFE_CTL_MCAST_HASH 0x00000008

◆ RFE_CTL_RST

#define RFE_CTL_RST 0x00000001

◆ RFE_CTL_SA_FILTER

#define RFE_CTL_SA_FILTER 0x00000010

◆ RFE_CTL_TCPUDP_COE

#define RFE_CTL_TCPUDP_COE 0x00001000

◆ RFE_CTL_UCAST_EN

#define RFE_CTL_UCAST_EN 0x00000100

◆ RFE_CTL_VLAN_FILTER

#define RFE_CTL_VLAN_FILTER 0x00000020

◆ RFE_CTL_VLAN_STRIP

#define RFE_CTL_VLAN_STRIP 0x00000080

◆ RX_ADDRH

#define RX_ADDRH 0x118

◆ RX_ADDRH_MASK_

#define RX_ADDRH_MASK_ 0x0000FFFF

◆ RX_ADDRL

#define RX_ADDRL 0x11C

◆ RX_ADDRL_MASK_

#define RX_ADDRL_MASK_ 0xFFFFFFFF

◆ RX_CMD_A_LEN_MASK

#define RX_CMD_A_LEN_MASK 0x00003FFF

◆ RX_CMD_A_RED

#define RX_CMD_A_RED 0x00400000

◆ RX_HEADER_SIZE

#define RX_HEADER_SIZE (4 + 4 + 2)

◆ TX_CMD_A_FCS

#define TX_CMD_A_FCS 0x00400000

◆ TX_CMD_A_LEN_MASK

#define TX_CMD_A_LEN_MASK 0x000FFFFF

◆ TX_HEADER_SIZE

#define TX_HEADER_SIZE (4 + 4)

◆ USB_CFG0

#define USB_CFG0 0x080

◆ USB_CFG_BCE

#define USB_CFG_BCE 0x00000020

◆ USB_CFG_BIR

#define USB_CFG_BIR 0x00000040

◆ WRITE_REGISTER

#define WRITE_REGISTER 0xA0

Function Documentation

◆ _LAN7800Device()

void _LAN7800Device ( TLAN7800Device * pThis )

◆ LAN7800Device()

void LAN7800Device	(	TLAN7800Device *	pThis,
		TUSBFunction *	pFunction
	)

◆ LAN7800DeviceConfigure()

boolean LAN7800DeviceConfigure ( TUSBFunction * pUSBFunction )

◆ LAN7800DeviceGetMACAddress()

TMACAddress * LAN7800DeviceGetMACAddress ( TLAN7800Device * pThis )

◆ LAN7800DeviceInitMACAddress()

boolean LAN7800DeviceInitMACAddress ( TLAN7800Device * pThis )

◆ LAN7800DeviceInitPHY()

boolean LAN7800DeviceInitPHY ( TLAN7800Device * pThis )

◆ LAN7800DeviceIsLinkUp()

boolean LAN7800DeviceIsLinkUp ( TLAN7800Device * pThis )

◆ LAN7800DevicePHYRead()

boolean LAN7800DevicePHYRead	(	TLAN7800Device *	pThis,
		u8	uchIndex,
		u16 *	pValue
	)

◆ LAN7800DevicePHYWrite()

boolean LAN7800DevicePHYWrite	(	TLAN7800Device *	pThis,
		u8	uchIndex,
		u16	usValue
	)

◆ LAN7800DeviceReadReg()

boolean LAN7800DeviceReadReg	(	TLAN7800Device *	pThis,
		u32	nIndex,
		u32 *	pValue
	)

◆ LAN7800DeviceReadWriteReg()

boolean LAN7800DeviceReadWriteReg	(	TLAN7800Device *	pThis,
		u32	nIndex,
		u32	nOrMask,
		u32	nAndMask
	)

◆ LAN7800DeviceReceiveFrame()

boolean LAN7800DeviceReceiveFrame	(	TLAN7800Device *	pThis,
		void *	pBuffer,
		unsigned *	pResultLength
	)

◆ LAN7800DeviceSendFrame()

boolean LAN7800DeviceSendFrame	(	TLAN7800Device *	pThis,
		const void *	pBuffer,
		unsigned	nLength
	)

◆ LAN7800DeviceWaitReg()

boolean LAN7800DeviceWaitReg	(	TLAN7800Device *	pThis,
		u32	nIndex,
		u32	nMask,
		u32	nCompare
	)

◆ LAN7800DeviceWriteReg()

boolean LAN7800DeviceWriteReg	(	TLAN7800Device *	pThis,
		u32	nIndex,
		u32	nValue
	)

Macros

Functions