#include <Pal.h>
◆ CacheType
| UINT64 PAL_MC_ERROR_STRUCT_INFO::CacheType |
Bit2:1 Indicates which cache should be used for error injection: 0 - Reserved 1 - Instruction cache 2 - Data or unified cache 3 - Reserved
◆ DataPoisonOfCacheLine
| UINT64 PAL_MC_ERROR_STRUCT_INFO::DataPoisonOfCacheLine |
Bit9 When 1, indicates that a multiple bit, non-correctable error should be injected in the cache line specified by cl_id. If this injected error is not consumed, it may eventually cause a data-poisoning event resulting in a corrected error signal, when the associated cache line is cast out (implicit or explicit write-back of the cache line). The error severity specified by err_sev in err_type_info must be set to 0 (corrected error) when this bit is set.
◆ Mechanism
| UINT64 PAL_MC_ERROR_STRUCT_INFO::Mechanism |
Bit8:6 Indicates which mechanism is used to identify the cache line to be used for error injection: 0 - Reserved 1 - Virtual address provided in the inj_addr field of the buffer pointed to by err_data_buffer should be used to identify the cache line for error injection. 2 - Physical address provided in the inj_addr field of the buffer pointed to by err_data_buffershould be used to identify the cache line for error injection. 3 - way and index fields provided in err_data_buffer should be used to identify the cache line for error injection. All other values are reserved.
◆ PortionOfCacheLine
| UINT64 PAL_MC_ERROR_STRUCT_INFO::PortionOfCacheLine |
Bit5:3 Indicates the portion of the cache line where the error should be injected: 0 - Reserved 1 - Tag 2 - Data 3 - mesi All other values are reserved.
◆ PrivilegeOfTriger
| UINT64 PAL_MC_ERROR_STRUCT_INFO::PrivilegeOfTriger |
Bit39:37 Indicates the privilege level of the context during which the error should be injected: 0 - privilege level 0 1 - privilege level 1 2 - privilege level 2 3 - privilege level 3 All other values are reserved. If the implementation does not support privilege level qualifier for triggers (i.e. if trigger_pl is 0 in the capabilities vector), this field is ignored and triggers can be taken at any privilege level.
◆ Reserved1
| UINT64 PAL_MC_ERROR_STRUCT_INFO::Reserved1 |
◆ Reserved2
| UINT64 PAL_MC_ERROR_STRUCT_INFO::Reserved2 |
◆ StructInfoIsValid
| UINT64 PAL_MC_ERROR_STRUCT_INFO::StructInfoIsValid |
Bit0 When 1, indicates that the structure information fields (c_t,cl_p,cl_id) are valid and should be used for error injection. When 0, the structure information fields are ignored, and the values of these fields used for error injection are implementation-specific.
◆ Triger
| UINT64 PAL_MC_ERROR_STRUCT_INFO::Triger |
Bit36:33 Indicates the operation type to be used as the error trigger condition. The address corresponding to the trigger is specified in the trigger_addr field of the buffer pointed to by err_data_buffer: 0 - Instruction memory access. The trigger match conditions for this operation type are similar to the IBR address breakpoint match conditions 1 - Data memory access. The trigger match conditions for this operation type are similar to the DBR address breakpoint match conditions All other values are reserved.
◆ TrigerInfoIsValid
| UINT64 PAL_MC_ERROR_STRUCT_INFO::TrigerInfoIsValid |
Bit32 When 1, indicates that the trigger information fields (trigger, trigger_pl) are valid and should be used for error injection. When 0, the trigger information fields are ignored and error injection is performed immediately.
The documentation for this struct was generated from the following file:
- XenevaOS/Boot/include/IndustryStandard/Pal.h
