#include <Pal.h>
◆ DisableBinitWithTimeout
| UINT64 PAL_PROCESSOR_FEATURES::DisableBinitWithTimeout |
Bit56, Disable a BINIT on internal processor time-out. When 0, the processor may generate a BINIT on an internal processor time-out. When 1, the processor will not generate a BINIT on an internal processor time-out. The event is silently ignored.
◆ DisableBranchPrediction
| UINT64 PAL_PROCESSOR_FEATURES::DisableBranchPrediction |
Bit47, Disable Dynamic branch prediction. When 0, the processor may predict branch targets and speculatively execute, but may not commit results. When 1, the processor must wait until branch targets are known to execute.
◆ DisableCache
| UINT64 PAL_PROCESSOR_FEATURES::DisableCache |
Bit59, Disable Cache. When 0, the processor performs cast outs on cacheable pages and issues and responds to coherency requests normally. When 1, the processor performs a memory access for each reference regardless of cache contents and issues no coherence requests and responds as if the line were not present. Cache contents cannot be relied upon when the cache is disabled. WARNING: Semaphore instructions may not be atomic or may cause Unsupported Data Reference faults if caches are disabled.
◆ DisableCoherency
| UINT64 PAL_PROCESSOR_FEATURES::DisableCoherency |
Bit58, Disable Coherency. When 0, the processor uses normal coherency requests and responses. When 1, the processor answers all requests as if the line were not present.
◆ DisableDPM
| UINT64 PAL_PROCESSOR_FEATURES::DisableDPM |
Bit57, Disable Dynamic Power Management (DPM). When 0, the hardware may reduce power consumption by removing the clock input from idle functional units. When 1, all functional units will receive clock input, even when idle.
◆ DisableDynamicDataCachePrefetch
| UINT64 PAL_PROCESSOR_FEATURES::DisableDynamicDataCachePrefetch |
Bit45, Disable Dynamic Data Cache Prefetch. When 0, the processor may prefetch into the caches any data which has not been accessed by instruction execution, but which is likely to be accessed. When 1, no data may be fetched until it is needed for instruction execution or is fetched by an lfetch instruction.
◆ DisableDynamicInsCachePrefetch
| UINT64 PAL_PROCESSOR_FEATURES::DisableDynamicInsCachePrefetch |
Bit46, Disable DynamicInstruction Cache Prefetch. When 0, the processor may prefetch into the caches any instruction which has not been executed, but whose execution is likely. When 1, instructions may not be fetched until needed or hinted for execution. (Prefetch for a hinted branch is allowed even when dynamic instruction cache prefetch is disabled.)
◆ DisableDynamicPrediction
| UINT64 PAL_PROCESSOR_FEATURES::DisableDynamicPrediction |
Bit43, Disable Dynamic Predicate Prediction. When 0, the processor may predict predicate results and execute speculatively, but may not commit results until the actual predicates are known. When 1, the processor shall not execute predicated instructions until the actual predicates are known.
◆ DisablePState
| UINT64 PAL_PROCESSOR_FEATURES::DisablePState |
Bit52, Disable P-states. When 1, the PAL P-state procedures (PAL_PSTATE_INFO, PAL_SET_PSTATE, PAL_GET_PSTATE) will return with a status of -1 (Unimplemented procedure).
◆ DisableSpontaneousDeferral
| UINT64 PAL_PROCESSOR_FEATURES::DisableSpontaneousDeferral |
Bit44, Disable Spontaneous Deferral. When 1, the processor may optionally defer speculative loads that do not encounter any exception conditions, but that trigger other implementation-dependent conditions (e.g., cache miss). When 0, spontaneous deferral is disabled.
◆ EnableBerrPromotion
| UINT64 PAL_PROCESSOR_FEATURES::EnableBerrPromotion |
Bit63. Enable BERR promotion. When 1, the Bus Error (BERR) signal is promoted to the Bus Initialization (BINIT) signal, and the BINIT pin is asserted on the occurrence of each Bus Error. Setting this bit has no effect if BINIT signalling is disabled. (See PAL_BUS_GET/SET_FEATURES)
◆ EnableCmciPromotion
| UINT64 PAL_PROCESSOR_FEATURES::EnableCmciPromotion |
Bit60, Enable CMCI promotion When 1, Corrected Machine Check Interrupts (CMCI) are promoted to MCAs. They are also further promoted to BERR if bit 39, Enable MCA promotion, is also set and they are promoted to BINIT if bit 38, Enable MCA to BINIT promotion, is also set. This bit has no effect if MCA signalling is disabled (see PAL_BUS_GET/SET_FEATURES)
◆ EnableEnvNotification
| UINT64 PAL_PROCESSOR_FEATURES::EnableEnvNotification |
Bit55, Enable external notification when the processor detects hardware errors caused by environmental factors that could cause loss of deterministic behavior of the processor. When 1, this bit will enable external notification, when 0 external notification is not provided. The type of external notification of these errors is processor-dependent. A loss of processor deterministic behavior is considered to have occurred if these environmentally induced errors cause the processor to deviate from its normal execution and eventually causes different behavior which can be observed at the processor bus pins. Processor errors that do not have this effects (i.e., software induced machine checks) may or may not be promoted depending on the processor implementation.
◆ EnableMcaOnDataPoisoning
| UINT64 PAL_PROCESSOR_FEATURES::EnableMcaOnDataPoisoning |
Bit53, Enable MCA signaling on data-poisoning event detection. When 0, a CMCI will be signaled on error detection. When 1, an MCA will be signaled on error detection. If this feature is not supported, then the corresponding argument is ignored when calling PAL_PROC_SET_FEATURES. Note that the functionality of this bit is independent of the setting in bit 60 (Enable CMCI promotion), and that the bit 60 setting does not affect CMCI signaling for data-poisoning related events. Volume 2: Processor Abstraction Layer 2:431 PAL_PROC_GET_FEATURES
◆ EnableMcaPromotion
| UINT64 PAL_PROCESSOR_FEATURES::EnableMcaPromotion |
Bit62, Enable MCA promotion. When 1, machine check aborts (MCAs) are promoted to the Bus Error signal, and the BERR pin is assert on each occurrence of an MCA. Setting this bit has no effect if BERR signalling is disabled. (See PAL_BUS_GET/SET_FEATURES)
◆ EnableMcaToBinitPromotion
| UINT64 PAL_PROCESSOR_FEATURES::EnableMcaToBinitPromotion |
Bit61, Enable MCA to BINIT promotion. When 1, machine check aborts (MCAs) are promoted to the Bus Initialization signal, and the BINIT pin is assert on each occurrence of an MCA. Setting this bit has no effect if BINIT signalling is disabled. (See PAL_BUS_GET/SET_FEATURES)
◆ EnableVmsw
| UINT64 PAL_PROCESSOR_FEATURES::EnableVmsw |
Bit54, Enable the use of the vmsw instruction. When 0, the vmsw instruction causes a Virtualization fault when executed at the most privileged level. When 1, this bit will enable normal operation of the vmsw instruction.
◆ FaultInUndefinedIns
| UINT64 PAL_PROCESSOR_FEATURES::FaultInUndefinedIns |
Bit36, No Unimplemented instruction address reported as fault. Denotes how the processor reports the detection of unimplemented instruction addresses. When 1, the processor reports an Unimplemented Instruction Address fault on the unimplemented address; when 0, it reports an Unimplemented Instruction Address trap on the previous instruction in program order. This feature may only be interrogated by PAL_PROC_GET_FEATURES. It may not be enabled or disabled by PAL_PROC_SET_FEATURES. The corresponding argument is ignored.
◆ NoPresentPmi
| UINT64 PAL_PROCESSOR_FEATURES::NoPresentPmi |
Bit37, No INIT, PMI, and LINT pins present. Denotes the absence of INIT, PMI, LINT0 and LINT1 pins on the processor. When 1, the pins are absent. When 0, the pins are present. This feature may only be interrogated by PAL_PROC_GET_FEATURES. It may not be enabled or disabled by PAL_PROC_SET_FEATURES. The corresponding argument is ignored.
◆ NoSimpleImpInUndefinedIns
| UINT64 PAL_PROCESSOR_FEATURES::NoSimpleImpInUndefinedIns |
Bit38, No Simple implementation of unimplemented instruction addresses. Denotes how an unimplemented instruction address is recorded in IIP on an Unimplemented Instruction Address trap or fault. When 1, the full unimplemented address is recorded in IIP; when 0, the address is sign extended (virtual addresses) or zero extended (physical addresses). This feature may only be interrogated by PAL_PROC_GET_FEATURES. It may not be enabled or disabled by PAL_PROC_SET_FEATURES. The corresponding argument is ignored.
◆ NoVariablePState
| UINT64 PAL_PROCESSOR_FEATURES::NoVariablePState |
Bit39, No Variable P-state performance: A value of 1, indicates that a processor implements techniques to optimize performance for the given P-state power budget by dynamically varying the frequency, such that maximum performance is achieved for the power budget. A value of 0, indicates that P-states have no frequency variation or very small frequency variations for their given power budget. This feature may only be interrogated by PAL_PROC_GET_FEATURES. it may not be enabled or disabled by PAL_PROC_SET_FEATURES. The corresponding argument is ignored.
◆ NoVM
| UINT64 PAL_PROCESSOR_FEATURES::NoVM |
Bit40, No Virtual Machine features implemented. Denotes whether PSR.vm is implemented. This feature may only be interrogated by PAL_PROC_GET_FEATURES. It may not be enabled or disabled by PAL_PROC_SET_FEATURES. The corresponding argument is ignored.
◆ NoXipXpsrXfs
| UINT64 PAL_PROCESSOR_FEATURES::NoXipXpsrXfs |
Bit41, No XIP, XPSR, and XFS implemented. Denotes whether XIP, XPSR, and XFS are implemented for machine check recovery. This feature may only be interrogated by PAL_PROC_GET_FEATURES. It may not be enabled or disabled by PAL_PROC_SET_FEATURES. The corresponding argument is ignored.
◆ NoXr1ThroughXr3
| UINT64 PAL_PROCESSOR_FEATURES::NoXr1ThroughXr3 |
Bit42, No XR1 through XR3 implemented. Denotes whether XR1 XR3 are implemented for machine check recovery. This feature may only be interrogated by PAL_PROC_GET_FEATURES. It may not be enabled or disabled by PAL_PROC_SET_FEATURES. The corresponding argument is ignored.
◆ Reserved1
| UINT64 PAL_PROCESSOR_FEATURES::Reserved1 |
◆ Reserved2
| UINT64 PAL_PROCESSOR_FEATURES::Reserved2 |
The documentation for this struct was generated from the following file:
- XenevaOS/Boot/include/IndustryStandard/Pal.h
