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XenevaOS
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#include <Pal.h>
Public Attributes | |
| UINT64 | WalkerPresent:1 |
| UINT64 | WidthOfPhysicalAddress: 7 |
| UINT64 | WidthOfKey:8 |
| UINT64 | MaxPkrIndex:8 |
| UINT64 | HashTagId:8 |
| UINT64 | MaxDtrIndex:8 |
| UINT64 | MaxItrIndex:8 |
| UINT64 | NumberOfUniqueTc:8 |
| UINT64 | NumberOfTcLevels:8 |
| UINT64 PAL_VM_INFO1::HashTagId |
Unsigned 8-bit integer which uniquely identifies the processor hash and tag algorithm.
| UINT64 PAL_VM_INFO1::MaxDtrIndex |
Unsigned 8 bit integer denoting the maximum data translation register index (number of dtr entries - 1).
| UINT64 PAL_VM_INFO1::MaxItrIndex |
Unsigned 8 bit integer denoting the maximum instruction translation register index (number of itr entries - 1).
| UINT64 PAL_VM_INFO1::MaxPkrIndex |
Unsigned 8-bit integer denoting the maximum PKR index (number of PKRs-1).
| UINT64 PAL_VM_INFO1::NumberOfTcLevels |
Unsigned 8-bit integer denoting the number of TC levels.
| UINT64 PAL_VM_INFO1::NumberOfUniqueTc |
Unsigned 8-bit integer denoting the number of unique TCs implemented. This is a maximum of 2*num_tc_levels.
| UINT64 PAL_VM_INFO1::WalkerPresent |
1-bit flag indicating whether a hardware TLB walker is implemented (1 = walker present).
| UINT64 PAL_VM_INFO1::WidthOfKey |
Unsigned 8-bit integer denoting the number of bits mplemented in the PKR.key field.
| UINT64 PAL_VM_INFO1::WidthOfPhysicalAddress |
Unsigned 7-bit integer denoting the number of bits of physical address implemented.