#include <Pci22.h>

Public Attributes
UINT32	CardBusSocketReg
	Cardus Socket/ExCA Base.

UINT8	Cap_Ptr

UINT8	Reserved

UINT16	SecondaryStatus
	Secondary Status.

UINT8	PciBusNumber
	PCI Bus Number.

UINT8	CardBusBusNumber
	CardBus Bus Number.

UINT8	SubordinateBusNumber
	Subordinate Bus Number.

UINT8	CardBusLatencyTimer
	CardBus Latency Timer.

UINT32	MemoryBase0
	Memory Base Register 0.

UINT32	MemoryLimit0
	Memory Limit Register 0.

UINT32	MemoryBase1

UINT32	MemoryLimit1

UINT32	IoBase0

UINT32	IoLimit0
	I/O Base Register 0.

UINT32	IoBase1
	I/O Limit Register 0.

UINT32	IoLimit1

UINT8	InterruptLine
	Interrupt Line.

UINT8	InterruptPin
	Interrupt Pin.

UINT16	BridgeControl
	Bridge Control.

Detailed Description

CardBus Conroller Configuration Space, Section 4.5.1, PC Card Standard. 8.0

Member Data Documentation

◆ BridgeControl

UINT16 PCI_CARDBUS_CONTROL_REGISTER::BridgeControl

Bridge Control.

◆ Cap_Ptr

UINT8 PCI_CARDBUS_CONTROL_REGISTER::Cap_Ptr

◆ CardBusBusNumber

UINT8 PCI_CARDBUS_CONTROL_REGISTER::CardBusBusNumber

CardBus Bus Number.

◆ CardBusLatencyTimer

UINT8 PCI_CARDBUS_CONTROL_REGISTER::CardBusLatencyTimer

CardBus Latency Timer.

◆ CardBusSocketReg

UINT32 PCI_CARDBUS_CONTROL_REGISTER::CardBusSocketReg

Cardus Socket/ExCA Base.

◆ InterruptLine

UINT8 PCI_CARDBUS_CONTROL_REGISTER::InterruptLine

Interrupt Line.

◆ InterruptPin

UINT8 PCI_CARDBUS_CONTROL_REGISTER::InterruptPin

Interrupt Pin.

◆ IoBase0

UINT32 PCI_CARDBUS_CONTROL_REGISTER::IoBase0

◆ IoBase1

UINT32 PCI_CARDBUS_CONTROL_REGISTER::IoBase1

I/O Limit Register 0.

◆ IoLimit0

UINT32 PCI_CARDBUS_CONTROL_REGISTER::IoLimit0

I/O Base Register 0.

◆ IoLimit1

UINT32 PCI_CARDBUS_CONTROL_REGISTER::IoLimit1

◆ MemoryBase0

UINT32 PCI_CARDBUS_CONTROL_REGISTER::MemoryBase0

Memory Base Register 0.

◆ MemoryBase1

UINT32 PCI_CARDBUS_CONTROL_REGISTER::MemoryBase1

◆ MemoryLimit0

UINT32 PCI_CARDBUS_CONTROL_REGISTER::MemoryLimit0

Memory Limit Register 0.

◆ MemoryLimit1

UINT32 PCI_CARDBUS_CONTROL_REGISTER::MemoryLimit1

◆ PciBusNumber

UINT8 PCI_CARDBUS_CONTROL_REGISTER::PciBusNumber

PCI Bus Number.

◆ Reserved

UINT8 PCI_CARDBUS_CONTROL_REGISTER::Reserved

◆ SecondaryStatus

UINT16 PCI_CARDBUS_CONTROL_REGISTER::SecondaryStatus

Secondary Status.

◆ SubordinateBusNumber

UINT8 PCI_CARDBUS_CONTROL_REGISTER::SubordinateBusNumber

Subordinate Bus Number.

The documentation for this struct was generated from the following file:

XenevaOS/Boot/include/IndustryStandard/Pci22.h

Public Attributes