drm_amdgpu_userq_fence_info Struct Reference

#include <amdgpu_drm.h>

Public Attributes
__u64	va
__u64	value

Member Data Documentation

va

__u64 drm_amdgpu_userq_fence_info::va

@va: A gpu address allocated for each queue which stores the read pointer (RPTR) value.

value

__u64 drm_amdgpu_userq_fence_info::value

@value: A 64 bit value represents the write pointer (WPTR) of the queue commands which compared with the RPTR value to signal the fences.

---

The documentation for this struct was generated from the following file:

• XenevaOS/BaseHdr/uapi/drm/amdgpu_drm.h