#include <asahi_drm.h>
Detailed Description
struct drm_asahi_cmd_render - Command to submit 3D
This command submits a single render pass. The hardware control stream may include many draws and subpasses, but within the command, the framebuffer dimensions and attachments are fixed.
The hardware requires the firmware to set a large number of Control Registers setting up state at render pass granularity before each command rendering 3D. The firmware bundles this state into data structures. Unfortunately, we cannot expose either any of that directly to userspace, because the kernel-firmware ABI is not stable. Although we can guarantee the firmware updates in tandem with the kernel, we cannot break old userspace when upgrading the firmware and kernel. Therefore, we need to abstract well the data structures to avoid tying our hands with future firmwares.
The bulk of drm_asahi_cmd_render therefore consists of values of hardware control registers, marshalled via the firmware interface.
The framebuffer/tilebuffer dimensions are also specified here. In addition to being passed to the firmware/hardware, the kernel requires these dimensions to calculate various essential tiling-related data structures. It is unfortunate that our submits are heavier than on vendors with saner hardware-software interfaces. The upshot is all of this information is readily available to userspace with all current APIs.
It looks odd - but it's not overly burdensome and it ensures we can remain compatible with old userspace.
Member Data Documentation
◆ bg
| struct drm_asahi_bg_eot drm_asahi_cmd_render::bg |
@bg: Background program run for each tile at the start
◆ depth
| struct drm_asahi_zls_buffer drm_asahi_cmd_render::depth |
@depth: Depth buffer
◆ eot
| struct drm_asahi_bg_eot drm_asahi_cmd_render::eot |
@eot: End-of-tile program ran for each tile at the end
◆ flags
| __u32 drm_asahi_cmd_render::flags |
@flags: Combination of drm_asahi_render_flags flags.
◆ fragment_helper
| struct drm_asahi_helper_program drm_asahi_cmd_render::fragment_helper |
@fragment_helper: Helper program used for the fragment shader
◆ height_px
| __u16 drm_asahi_cmd_render::height_px |
@height_px: Framebuffer height in pixels
◆ isp_bgobjdepth
| __u32 drm_asahi_cmd_render::isp_bgobjdepth |
@isp_bgobjdepth: ISP_BGOBJDEPTH register value. This is the depth buffer clear value, encoded in the depth buffer's format: either a 32-bit float or a 16-bit unorm (with upper bits zeroed).
◆ isp_bgobjvals
| __u32 drm_asahi_cmd_render::isp_bgobjvals |
@isp_bgobjvals: ISP_BGOBJVALS register value. The bottom 8-bits contain the stencil buffer clear value.
◆ isp_dbias_base
| __u64 drm_asahi_cmd_render::isp_dbias_base |
@isp_dbias_base: ISP_DBIAS_BASE register value. GPU address of an array of depth bias values indexed in the render pass.
◆ isp_merge_upper_x
| __u32 drm_asahi_cmd_render::isp_merge_upper_x |
@isp_merge_upper_x: 32-bit float used in the hardware triangle merging. Calculate as: tan(60 deg) * width.
Making these values UAPI avoids requiring floating-point calculations in the kernel in the hot path.
◆ isp_merge_upper_y
| __u32 drm_asahi_cmd_render::isp_merge_upper_y |
@isp_merge_upper_y: 32-bit float. Calculate as: tan(60 deg) * height. See @isp_merge_upper_x.
◆ isp_oclqry_base
| __u64 drm_asahi_cmd_render::isp_oclqry_base |
@isp_oclqry_base: ISP_OCLQRY_BASE register value. GPU address of an array of occlusion query results written by the render pass.
◆ isp_scissor_base
| __u64 drm_asahi_cmd_render::isp_scissor_base |
@isp_scissor_base: ISP_SCISSOR_BASE register value. GPU address of an array of scissor descriptors indexed in the render pass.
◆ isp_zls_pixels
| __u32 drm_asahi_cmd_render::isp_zls_pixels |
@isp_zls_pixels: ISP_ZLS_PIXELS register value. This contains the depth/stencil width/height, which may differ from the framebuffer width/height.
◆ layers
| __u16 drm_asahi_cmd_render::layers |
@layers: Number of layers in the framebuffer
◆ partial_bg
| struct drm_asahi_bg_eot drm_asahi_cmd_render::partial_bg |
@partial_bg: Background program ran at the start of each tile when resuming the render pass during a partial render.
◆ partial_eot
| struct drm_asahi_bg_eot drm_asahi_cmd_render::partial_eot |
@partial_eot: End-of-tile program ran at the end of each tile when pausing the render pass during a partial render.
◆ ppp_ctrl
| __u32 drm_asahi_cmd_render::ppp_ctrl |
@ppp_ctrl: PPP_CTRL register value
◆ ppp_multisamplectl
| __u64 drm_asahi_cmd_render::ppp_multisamplectl |
@ppp_multisamplectl: PPP_MULTISAMPLECTL register value
◆ sample_size_B
| __u8 drm_asahi_cmd_render::sample_size_B |
@sample_size_B: # of bytes in the tilebuffer required per sample.
◆ sampler_count
| __u16 drm_asahi_cmd_render::sampler_count |
@sampler_count: Number of samplers in the sampler heap.
◆ sampler_heap
| __u64 drm_asahi_cmd_render::sampler_heap |
@sampler_heap: Base address of the sampler heap. This heap is used for both vertex shaders and fragment shaders. The registers are per-stage, but there is no known use case for separate heaps.
◆ samples
| __u8 drm_asahi_cmd_render::samples |
@samples: # of samples in the framebuffer. Must be 1, 2, or 4.
◆ stencil
| struct drm_asahi_zls_buffer drm_asahi_cmd_render::stencil |
@stencil: Stencil buffer
◆ ts_frag
| struct drm_asahi_timestamps drm_asahi_cmd_render::ts_frag |
@ts_frag: Timestamps for the fragment portion of the render
◆ ts_vtx
| struct drm_asahi_timestamps drm_asahi_cmd_render::ts_vtx |
@ts_vtx: Timestamps for the vertex portion of the render
◆ utile_height_px
| __u8 drm_asahi_cmd_render::utile_height_px |
@utile_height_px: Height of a logical tilebuffer tile in pixels
◆ utile_width_px
| __u8 drm_asahi_cmd_render::utile_width_px |
@utile_width_px: Width of a logical tilebuffer tile in pixels
◆ vdm_ctrl_stream_base
| __u64 drm_asahi_cmd_render::vdm_ctrl_stream_base |
@vdm_ctrl_stream_base: VDM_CTRL_STREAM_BASE register value. GPU address to the beginning of the VDM control stream.
◆ vertex_helper
| struct drm_asahi_helper_program drm_asahi_cmd_render::vertex_helper |
@vertex_helper: Helper program used for the vertex shader
◆ width_px
| __u16 drm_asahi_cmd_render::width_px |
@width_px: Framebuffer width in pixels
◆ zls_ctrl
| __u64 drm_asahi_cmd_render::zls_ctrl |
@zls_ctrl: ZLS_CTRL register value
The documentation for this struct was generated from the following file:
- XenevaOS/BaseHdr/uapi/drm/asahi_drm.h
