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XenevaOS
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#include <xe_drm.h>
Public Attributes | |
| __u16 | gt_id |
| __u16 | type |
| __u32 | num_bytes |
| __u8 | mask [] |
struct drm_xe_query_topology_mask - describe the topology mask of a GT
This is the hardware topology which reflects the internal physical structure of the GPU.
If a query is made with a struct drm_xe_device_query where .query is equal to DRM_XE_DEVICE_QUERY_GT_TOPOLOGY, then the reply uses struct drm_xe_query_topology_mask in .data.
The @type can be:
DSS_GEOMETRY ff ff ff ff 00 00 00 00 means 32 DSS are available for geometry.DSS_COMPUTE ff ff ff ff 00 00 00 00 means 32 DSS are available for compute.EU_PER_DSS ff ff 00 00 00 00 00 00 means each DSS has 16 SIMD8 EUs. This type may be omitted if device doesn't have SIMD8 EUs.SIMD16_EU_PER_DSS ff ff 00 00 00 00 00 00 means each DSS has 16 SIMD16 EUs. This type may be omitted if device doesn't have SIMD16 EUs. | __u16 drm_xe_query_topology_mask::gt_id |
@gt_id: GT ID the mask is associated with
| __u8 drm_xe_query_topology_mask::mask[] |
@mask: little-endian mask of @num_bytes
| __u32 drm_xe_query_topology_mask::num_bytes |
@num_bytes: number of bytes in requested mask
| __u16 drm_xe_query_topology_mask::type |
@type: type of mask