PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_STATUS Union Reference

#include <PciExpress40.h>

Public Attributes
struct {
UINT32   EqualizationComplete: 1
UINT32   EqualizationPhase1Success: 1
UINT32   EqualizationPhase2Success: 1
UINT32   EqualizationPhase3Success: 1
UINT32   LinkEqualizationRequest: 1
UINT32   Reserved: 27
}	Bits
UINT32	Uint32

Member Data Documentation

[struct]

struct { ... } PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_STATUS::Bits

EqualizationComplete

UINT32 PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_STATUS::EqualizationComplete

EqualizationPhase1Success

UINT32 PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_STATUS::EqualizationPhase1Success

EqualizationPhase2Success

UINT32 PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_STATUS::EqualizationPhase2Success

EqualizationPhase3Success

UINT32 PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_STATUS::EqualizationPhase3Success

LinkEqualizationRequest

UINT32 PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_STATUS::LinkEqualizationRequest

Reserved

UINT32 PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_STATUS::Reserved

Uint32

UINT32 PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_STATUS::Uint32

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The documentation for this union was generated from the following file:

• XenevaOS/Boot/include/IndustryStandard/PciExpress40.h