#include <PciExpress21.h>

Public Attributes
struct {

UINT32 CompletionTimeoutRanges: 4

UINT32 CompletionTimeoutDisable: 1

UINT32 AriForwarding: 1

UINT32 AtomicOpRouting: 1

UINT32 AtomicOp32Completer: 1

UINT32 AtomicOp64Completer: 1

UINT32 Cas128Completer: 1

UINT32 NoRoEnabledPrPrPassing: 1

UINT32 LtrMechanism: 1

UINT32 TphCompleter: 2

UINT32 Reserved: 4

UINT32 Obff: 2

UINT32 ExtendedFmtField: 1

UINT32 EndEndTlpPrefix: 1

UINT32 MaxEndEndTlpPrefixes: 2

UINT32 Reserved2: 8

}	Bits

UINT32	Uint32

Member Data Documentation

◆ AriForwarding

UINT32 PCI_REG_PCIE_DEVICE_CAPABILITY2::AriForwarding

◆ AtomicOp32Completer

UINT32 PCI_REG_PCIE_DEVICE_CAPABILITY2::AtomicOp32Completer

◆ AtomicOp64Completer

UINT32 PCI_REG_PCIE_DEVICE_CAPABILITY2::AtomicOp64Completer

◆ AtomicOpRouting

UINT32 PCI_REG_PCIE_DEVICE_CAPABILITY2::AtomicOpRouting

◆ [struct]

struct { ... } PCI_REG_PCIE_DEVICE_CAPABILITY2::Bits

◆ Cas128Completer

UINT32 PCI_REG_PCIE_DEVICE_CAPABILITY2::Cas128Completer

◆ CompletionTimeoutDisable

UINT32 PCI_REG_PCIE_DEVICE_CAPABILITY2::CompletionTimeoutDisable

◆ CompletionTimeoutRanges

UINT32 PCI_REG_PCIE_DEVICE_CAPABILITY2::CompletionTimeoutRanges

◆ EndEndTlpPrefix

UINT32 PCI_REG_PCIE_DEVICE_CAPABILITY2::EndEndTlpPrefix

◆ ExtendedFmtField

UINT32 PCI_REG_PCIE_DEVICE_CAPABILITY2::ExtendedFmtField

◆ LtrMechanism

UINT32 PCI_REG_PCIE_DEVICE_CAPABILITY2::LtrMechanism

◆ MaxEndEndTlpPrefixes

UINT32 PCI_REG_PCIE_DEVICE_CAPABILITY2::MaxEndEndTlpPrefixes

◆ NoRoEnabledPrPrPassing

UINT32 PCI_REG_PCIE_DEVICE_CAPABILITY2::NoRoEnabledPrPrPassing

◆ Obff

UINT32 PCI_REG_PCIE_DEVICE_CAPABILITY2::Obff

◆ Reserved

UINT32 PCI_REG_PCIE_DEVICE_CAPABILITY2::Reserved

◆ Reserved2

UINT32 PCI_REG_PCIE_DEVICE_CAPABILITY2::Reserved2

◆ TphCompleter

UINT32 PCI_REG_PCIE_DEVICE_CAPABILITY2::TphCompleter

◆ Uint32

UINT32 PCI_REG_PCIE_DEVICE_CAPABILITY2::Uint32

The documentation for this union was generated from the following file:

XenevaOS/Boot/include/IndustryStandard/PciExpress21.h

Public Attributes