EFI SMM Control2 Protocol as defined in the PI 1.2 specification.
This protocol is used initiate synchronous SMI activations. This protocol could be published by a processor driver to abstract the SMI IPI or a driver which abstracts the ASIC that is supporting the APM port. Because of the possibility of performing SMI IPI transactions, the ability to generate this event from a platform chipset agent is an optional capability for both IA-32 and x64-based systems.
The EFI_SMM_CONTROL2_PROTOCOL is produced by a runtime driver. It provides an abstraction of the platform hardware that generates an SMI. There are often I/O ports that, when accessed, will generate the SMI. Also, the hardware optionally supports the periodic generation of these signals.
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