#include <PciCfg2.h>
Collaboration diagram for _EFI_PEI_PCI_CFG2_PPI:
Public Attributes | |
| EFI_PEI_PCI_CFG2_PPI_IO | Read |
| EFI_PEI_PCI_CFG2_PPI_IO | Write |
| EFI_PEI_PCI_CFG2_PPI_RW | Modify |
| UINT16 | Segment |
Detailed Description
The EFI_PEI_PCI_CFG_PPI interfaces are used to abstract accesses to PCI controllers behind a PCI root bridge controller.
Member Data Documentation
◆ Modify
| EFI_PEI_PCI_CFG2_PPI_RW _EFI_PEI_PCI_CFG2_PPI::Modify |
◆ Read
| EFI_PEI_PCI_CFG2_PPI_IO _EFI_PEI_PCI_CFG2_PPI::Read |
◆ Segment
| UINT16 _EFI_PEI_PCI_CFG2_PPI::Segment |
The PCI bus segment which the specified functions will access.
◆ Write
| EFI_PEI_PCI_CFG2_PPI_IO _EFI_PEI_PCI_CFG2_PPI::Write |
The documentation for this struct was generated from the following file:
- XenevaOS/Boot/include/Ppi/PciCfg2.h
