drm_i915_gem_get_tiling Struct Reference

#include <i915_drm.h>

Public Attributes
__u32	handle
__u32	tiling_mode
__u32	swizzle_mode
__u32	phys_swizzle_mode

Member Data Documentation

handle

__u32 drm_i915_gem_get_tiling::handle

Handle of the buffer to get tiling state for.

phys_swizzle_mode

__u32 drm_i915_gem_get_tiling::phys_swizzle_mode

Returned address bit 6 swizzling required for CPU access through mmap mapping whilst bound.

swizzle_mode

__u32 drm_i915_gem_get_tiling::swizzle_mode

Returned address bit 6 swizzling required for CPU access through mmap mapping.

tiling_mode

__u32 drm_i915_gem_get_tiling::tiling_mode

Current tiling mode for the object (I915_TILING_NONE, I915_TILING_X, I915_TILING_Y).

---

The documentation for this struct was generated from the following file:

• XenevaOS/BaseHdr/uapi/drm/i915_drm.h