#include <i915_drm.h>

Public Attributes
__u16	flags

__u16	max_slices

__u16	max_subslices

__u16	max_eus_per_subslice

__u16	subslice_offset

__u16	subslice_stride

__u16	eu_offset

__u16	eu_stride

__u8	data []

Detailed Description

struct drm_i915_query_topology_info

Describes slice/subslice/EU information queried by DRM_I915_QUERY_TOPOLOGY_INFO

Member Data Documentation

◆ data

__u8 drm_i915_query_topology_info::data[]

@data:

Contains 3 pieces of information :

The slice mask with one bit per slice telling whether a slice is available. The availability of slice X can be queried with the following formula :

.. code:: c

(data[X / 8] >> (X % 8)) & 1

Starting with Xe_HP platforms, Intel hardware no longer has traditional slices so i915 will always report a single slice (hardcoded slicemask = 0x1) which contains all of the platform's subslices. I.e., the mask here does not reflect any of the newer hardware concepts such as "gslices" or "cslices" since userspace is capable of inferring those from the subslice mask.
The subslice mask for each slice with one bit per subslice telling whether a subslice is available. Starting with Gen12 we use the term "subslice" to refer to what the hardware documentation describes as a "dual-subslices." The availability of subslice Y in slice X can be queried with the following formula :

.. code:: c

(data[subslice_offset + X * subslice_stride + Y / 8] >> (Y % 8)) & 1
The EU mask for each subslice in each slice, with one bit per EU telling whether an EU is available. The availability of EU Z in subslice Y in slice X can be queried with the following formula :

.. code:: c

(data[eu_offset + (X * max_subslices + Y) * eu_stride + Z / 8 ] >> (Z % 8)) & 1

◆ eu_offset

__u16 drm_i915_query_topology_info::eu_offset

@eu_offset:

Offset in data[] at which the EU masks are stored.

◆ eu_stride

__u16 drm_i915_query_topology_info::eu_stride

@eu_stride:

Stride at which each of the EU masks for each subslice are stored.

◆ flags

__u16 drm_i915_query_topology_info::flags

@flags:

Unused for now. Must be cleared to zero.

◆ max_eus_per_subslice

__u16 drm_i915_query_topology_info::max_eus_per_subslice

@max_eus_per_subslice:

The number of bits in the EU mask that correspond to a single subslice's EUs.

◆ max_slices

__u16 drm_i915_query_topology_info::max_slices

@max_slices:

The number of bits used to express the slice mask.

◆ max_subslices

__u16 drm_i915_query_topology_info::max_subslices

@max_subslices:

The number of bits used to express the subslice mask.

◆ subslice_offset

__u16 drm_i915_query_topology_info::subslice_offset

@subslice_offset:

Offset in data[] at which the subslice masks are stored.

◆ subslice_stride

__u16 drm_i915_query_topology_info::subslice_stride

@subslice_stride:

Stride at which each of the subslice masks for each slice are stored.

The documentation for this struct was generated from the following file:

XenevaOS/BaseHdr/uapi/drm/i915_drm.h

Public Attributes