#include <SdramSpdLpDdr.h>

Public Attributes
struct {

UINT32 Cl3: 1
	Bits 0:0. More...

UINT32 Cl6: 1
	Bits 1:1. More...

UINT32 Cl8: 1
	Bits 2:2. More...

UINT32 Cl9: 1
	Bits 3:3. More...

UINT32 Cl10: 1
	Bits 4:4. More...

UINT32 Cl11: 1
	Bits 5:5. More...

UINT32 Cl12: 1
	Bits 6:6. More...

UINT32 Cl14: 1
	Bits 7:7. More...

UINT32 Cl16: 1
	Bits 8:8. More...

UINT32 Reserved0: 1
	Bits 9:9. More...

UINT32 Cl20: 1
	Bits 10:10. More...

UINT32 Cl22: 1
	Bits 11:11. More...

UINT32 Cl24: 1
	Bits 12:12. More...

UINT32 Reserved1: 1
	Bits 13:13. More...

UINT32 Cl28: 1
	Bits 14:14. More...

UINT32 Reserved2: 1
	Bits 15:15. More...

UINT32 Cl32: 1
	Bits 16:16. More...

UINT32 Reserved3: 1
	Bits 17:17. More...

UINT32 Cl36: 1
	Bits 18:18. More...

UINT32 Reserved4: 1
	Bits 19:19. More...

UINT32 Cl40: 1
	Bits 20:20. More...

UINT32 Reserved5: 11
	Bits 31:21. More...

}	Bits

UINT32	Data

UINT16	Data16 [2]

UINT8	Data8 [4]

Member Data Documentation

◆ [struct]

struct { ... } SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Bits

◆ Cl10

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Cl10

Bits 4:4.

◆ Cl11

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Cl11

Bits 5:5.

◆ Cl12

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Cl12

Bits 6:6.

◆ Cl14

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Cl14

Bits 7:7.

◆ Cl16

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Cl16

Bits 8:8.

◆ Cl20

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Cl20

Bits 10:10.

◆ Cl22

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Cl22

Bits 11:11.

◆ Cl24

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Cl24

Bits 12:12.

◆ Cl28

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Cl28

Bits 14:14.

◆ Cl3

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Cl3

Bits 0:0.

◆ Cl32

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Cl32

Bits 16:16.

◆ Cl36

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Cl36

Bits 18:18.

◆ Cl40

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Cl40

Bits 20:20.

◆ Cl6

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Cl6

Bits 1:1.

◆ Cl8

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Cl8

Bits 2:2.

◆ Cl9

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Cl9

Bits 3:3.

◆ Data

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Data

◆ Data16

UINT16 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Data16[2]

◆ Data8

UINT8 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Data8[4]

◆ Reserved0

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Reserved0

Bits 9:9.

◆ Reserved1

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Reserved1

Bits 13:13.

◆ Reserved2

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Reserved2

Bits 15:15.

◆ Reserved3

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Reserved3

Bits 17:17.

◆ Reserved4

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Reserved4

Bits 19:19.

◆ Reserved5

UINT32 SPD_LPDDR_CAS_LATENCIES_SUPPORTED_STRUCT::Reserved5

Bits 31:21.

The documentation for this union was generated from the following file:

XenevaOS/Boot/include/IndustryStandard/SdramSpdLpDdr.h

Public Attributes