v3d_drm.h File Reference

#include "drm.h"

Include dependency graph for v3d_drm.h:

Go to the source code of this file.

Classes
struct	drm_v3d_extension
struct	drm_v3d_sem
struct	drm_v3d_multi_sync
struct	drm_v3d_submit_cl
struct	drm_v3d_wait_bo
struct	drm_v3d_create_bo
struct	drm_v3d_mmap_bo
struct	drm_v3d_get_param
struct	drm_v3d_get_bo_offset
struct	drm_v3d_submit_tfu
struct	drm_v3d_submit_csd
struct	drm_v3d_indirect_csd
struct	drm_v3d_timestamp_query
struct	drm_v3d_reset_timestamp_query
struct	drm_v3d_copy_timestamp_query
struct	drm_v3d_reset_performance_query
struct	drm_v3d_copy_performance_query
struct	drm_v3d_submit_cpu
struct	drm_v3d_perfmon_create
struct	drm_v3d_perfmon_destroy
struct	drm_v3d_perfmon_get_values
struct	drm_v3d_perfmon_get_counter
struct	drm_v3d_perfmon_set_global

Macros
#define	DRM_V3D_SUBMIT_CL   0x00
#define	DRM_V3D_WAIT_BO   0x01
#define	DRM_V3D_CREATE_BO   0x02
#define	DRM_V3D_MMAP_BO   0x03
#define	DRM_V3D_GET_PARAM   0x04
#define	DRM_V3D_GET_BO_OFFSET   0x05
#define	DRM_V3D_SUBMIT_TFU   0x06
#define	DRM_V3D_SUBMIT_CSD   0x07
#define	DRM_V3D_PERFMON_CREATE   0x08
#define	DRM_V3D_PERFMON_DESTROY   0x09
#define	DRM_V3D_PERFMON_GET_VALUES   0x0a
#define	DRM_V3D_SUBMIT_CPU   0x0b
#define	DRM_V3D_PERFMON_GET_COUNTER   0x0c
#define	DRM_V3D_PERFMON_SET_GLOBAL   0x0d
#define	DRM_IOCTL_V3D_SUBMIT_CL   DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CL, struct drm_v3d_submit_cl)
#define	DRM_IOCTL_V3D_WAIT_BO   DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_WAIT_BO, struct drm_v3d_wait_bo)
#define	DRM_IOCTL_V3D_CREATE_BO   DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_CREATE_BO, struct drm_v3d_create_bo)
#define	DRM_IOCTL_V3D_MMAP_BO   DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_MMAP_BO, struct drm_v3d_mmap_bo)
#define	DRM_IOCTL_V3D_GET_PARAM   DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_PARAM, struct drm_v3d_get_param)
#define	DRM_IOCTL_V3D_GET_BO_OFFSET   DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_BO_OFFSET, struct drm_v3d_get_bo_offset)
#define	DRM_IOCTL_V3D_SUBMIT_TFU   DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_TFU, struct drm_v3d_submit_tfu)
#define	DRM_IOCTL_V3D_SUBMIT_CSD   DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CSD, struct drm_v3d_submit_csd)
#define	DRM_IOCTL_V3D_PERFMON_CREATE
#define	DRM_IOCTL_V3D_PERFMON_DESTROY
#define	DRM_IOCTL_V3D_PERFMON_GET_VALUES
#define	DRM_IOCTL_V3D_SUBMIT_CPU   DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CPU, struct drm_v3d_submit_cpu)
#define	DRM_IOCTL_V3D_PERFMON_GET_COUNTER
#define	DRM_IOCTL_V3D_PERFMON_SET_GLOBAL
#define	DRM_V3D_SUBMIT_CL_FLUSH_CACHE   0x01
#define	DRM_V3D_SUBMIT_EXTENSION   0x02
#define	DRM_V3D_EXT_ID_MULTI_SYNC   0x01
#define	DRM_V3D_EXT_ID_CPU_INDIRECT_CSD   0x02
#define	DRM_V3D_EXT_ID_CPU_TIMESTAMP_QUERY   0x03
#define	DRM_V3D_EXT_ID_CPU_RESET_TIMESTAMP_QUERY   0x04
#define	DRM_V3D_EXT_ID_CPU_COPY_TIMESTAMP_QUERY   0x05
#define	DRM_V3D_EXT_ID_CPU_RESET_PERFORMANCE_QUERY   0x06
#define	DRM_V3D_EXT_ID_CPU_COPY_PERFORMANCE_QUERY   0x07
#define	DRM_V3D_MAX_PERF_COUNTERS   32
#define	DRM_V3D_PERFCNT_MAX_NAME   64
#define	DRM_V3D_PERFCNT_MAX_CATEGORY   32
#define	DRM_V3D_PERFCNT_MAX_DESCRIPTION   256
#define	DRM_V3D_PERFMON_CLEAR_GLOBAL   0x0001

Enumerations
enum	v3d_queue {   V3D_BIN , V3D_RENDER , V3D_TFU , V3D_CSD ,   V3D_CACHE_CLEAN , V3D_CPU }
enum	drm_v3d_param {   DRM_V3D_PARAM_V3D_UIFCFG , DRM_V3D_PARAM_V3D_HUB_IDENT1 , DRM_V3D_PARAM_V3D_HUB_IDENT2 , DRM_V3D_PARAM_V3D_HUB_IDENT3 ,   DRM_V3D_PARAM_V3D_CORE0_IDENT0 , DRM_V3D_PARAM_V3D_CORE0_IDENT1 , DRM_V3D_PARAM_V3D_CORE0_IDENT2 , DRM_V3D_PARAM_SUPPORTS_TFU ,   DRM_V3D_PARAM_SUPPORTS_CSD , DRM_V3D_PARAM_SUPPORTS_CACHE_FLUSH , DRM_V3D_PARAM_SUPPORTS_PERFMON , DRM_V3D_PARAM_SUPPORTS_MULTISYNC_EXT ,   DRM_V3D_PARAM_SUPPORTS_CPU_QUEUE , DRM_V3D_PARAM_MAX_PERF_COUNTERS , DRM_V3D_PARAM_SUPPORTS_SUPER_PAGES , DRM_V3D_PARAM_GLOBAL_RESET_COUNTER ,   DRM_V3D_PARAM_CONTEXT_RESET_COUNTER }
enum	{   V3D_PERFCNT_FEP_VALID_PRIMTS_NO_PIXELS , V3D_PERFCNT_FEP_VALID_PRIMS , V3D_PERFCNT_FEP_EZ_NFCLIP_QUADS , V3D_PERFCNT_FEP_VALID_QUADS ,   V3D_PERFCNT_TLB_QUADS_STENCIL_FAIL , V3D_PERFCNT_TLB_QUADS_STENCILZ_FAIL , V3D_PERFCNT_TLB_QUADS_STENCILZ_PASS , V3D_PERFCNT_TLB_QUADS_ZERO_COV ,   V3D_PERFCNT_TLB_QUADS_NONZERO_COV , V3D_PERFCNT_TLB_QUADS_WRITTEN , V3D_PERFCNT_PTB_PRIM_VIEWPOINT_DISCARD , V3D_PERFCNT_PTB_PRIM_CLIP ,   V3D_PERFCNT_PTB_PRIM_REV , V3D_PERFCNT_QPU_IDLE_CYCLES , V3D_PERFCNT_QPU_ACTIVE_CYCLES_VERTEX_COORD_USER , V3D_PERFCNT_QPU_ACTIVE_CYCLES_FRAG ,   V3D_PERFCNT_QPU_CYCLES_VALID_INSTR , V3D_PERFCNT_QPU_CYCLES_TMU_STALL , V3D_PERFCNT_QPU_CYCLES_SCOREBOARD_STALL , V3D_PERFCNT_QPU_CYCLES_VARYINGS_STALL ,   V3D_PERFCNT_QPU_IC_HIT , V3D_PERFCNT_QPU_IC_MISS , V3D_PERFCNT_QPU_UC_HIT , V3D_PERFCNT_QPU_UC_MISS ,   V3D_PERFCNT_TMU_TCACHE_ACCESS , V3D_PERFCNT_TMU_TCACHE_MISS , V3D_PERFCNT_VPM_VDW_STALL , V3D_PERFCNT_VPM_VCD_STALL ,   V3D_PERFCNT_BIN_ACTIVE , V3D_PERFCNT_RDR_ACTIVE , V3D_PERFCNT_L2T_HITS , V3D_PERFCNT_L2T_MISSES ,   V3D_PERFCNT_CYCLE_COUNT , V3D_PERFCNT_QPU_CYCLES_STALLED_VERTEX_COORD_USER , V3D_PERFCNT_QPU_CYCLES_STALLED_FRAGMENT , V3D_PERFCNT_PTB_PRIMS_BINNED ,   V3D_PERFCNT_AXI_WRITES_WATCH_0 , V3D_PERFCNT_AXI_READS_WATCH_0 , V3D_PERFCNT_AXI_WRITE_STALLS_WATCH_0 , V3D_PERFCNT_AXI_READ_STALLS_WATCH_0 ,   V3D_PERFCNT_AXI_WRITE_BYTES_WATCH_0 , V3D_PERFCNT_AXI_READ_BYTES_WATCH_0 , V3D_PERFCNT_AXI_WRITES_WATCH_1 , V3D_PERFCNT_AXI_READS_WATCH_1 ,   V3D_PERFCNT_AXI_WRITE_STALLS_WATCH_1 , V3D_PERFCNT_AXI_READ_STALLS_WATCH_1 , V3D_PERFCNT_AXI_WRITE_BYTES_WATCH_1 , V3D_PERFCNT_AXI_READ_BYTES_WATCH_1 ,   V3D_PERFCNT_TLB_PARTIAL_QUADS , V3D_PERFCNT_TMU_CONFIG_ACCESSES , V3D_PERFCNT_L2T_NO_ID_STALL , V3D_PERFCNT_L2T_COM_QUE_STALL ,   V3D_PERFCNT_L2T_TMU_WRITES , V3D_PERFCNT_TMU_ACTIVE_CYCLES , V3D_PERFCNT_TMU_STALLED_CYCLES , V3D_PERFCNT_CLE_ACTIVE ,   V3D_PERFCNT_L2T_TMU_READS , V3D_PERFCNT_L2T_CLE_READS , V3D_PERFCNT_L2T_VCD_READS , V3D_PERFCNT_L2T_TMUCFG_READS ,   V3D_PERFCNT_L2T_SLC0_READS , V3D_PERFCNT_L2T_SLC1_READS , V3D_PERFCNT_L2T_SLC2_READS , V3D_PERFCNT_L2T_TMU_W_MISSES ,   V3D_PERFCNT_L2T_TMU_R_MISSES , V3D_PERFCNT_L2T_CLE_MISSES , V3D_PERFCNT_L2T_VCD_MISSES , V3D_PERFCNT_L2T_TMUCFG_MISSES ,   V3D_PERFCNT_L2T_SLC0_MISSES , V3D_PERFCNT_L2T_SLC1_MISSES , V3D_PERFCNT_L2T_SLC2_MISSES , V3D_PERFCNT_CORE_MEM_WRITES ,   V3D_PERFCNT_L2T_MEM_WRITES , V3D_PERFCNT_PTB_MEM_WRITES , V3D_PERFCNT_TLB_MEM_WRITES , V3D_PERFCNT_CORE_MEM_READS ,   V3D_PERFCNT_L2T_MEM_READS , V3D_PERFCNT_PTB_MEM_READS , V3D_PERFCNT_PSE_MEM_READS , V3D_PERFCNT_TLB_MEM_READS ,   V3D_PERFCNT_GMP_MEM_READS , V3D_PERFCNT_PTB_W_MEM_WORDS , V3D_PERFCNT_TLB_W_MEM_WORDS , V3D_PERFCNT_PSE_R_MEM_WORDS ,   V3D_PERFCNT_TLB_R_MEM_WORDS , V3D_PERFCNT_TMU_MRU_HITS , V3D_PERFCNT_COMPUTE_ACTIVE , V3D_PERFCNT_NUM }

Macro Definition Documentation

DRM_IOCTL_V3D_CREATE_BO

#define DRM_IOCTL_V3D_CREATE_BO   DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_CREATE_BO, struct drm_v3d_create_bo)

DRM_IOCTL_V3D_GET_BO_OFFSET

#define DRM_IOCTL_V3D_GET_BO_OFFSET   DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_BO_OFFSET, struct drm_v3d_get_bo_offset)

DRM_IOCTL_V3D_GET_PARAM

#define DRM_IOCTL_V3D_GET_PARAM   DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_PARAM, struct drm_v3d_get_param)

DRM_IOCTL_V3D_MMAP_BO

#define DRM_IOCTL_V3D_MMAP_BO   DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_MMAP_BO, struct drm_v3d_mmap_bo)

DRM_IOCTL_V3D_PERFMON_CREATE

#define DRM_IOCTL_V3D_PERFMON_CREATE

Value:

                           DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_PERFMON_CREATE, \
                           struct drm_v3d_perfmon_create)

DRM_IOCTL_V3D_PERFMON_DESTROY

#define DRM_IOCTL_V3D_PERFMON_DESTROY

Value:

                           DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_PERFMON_DESTROY, \
                           struct drm_v3d_perfmon_destroy)

DRM_IOCTL_V3D_PERFMON_GET_COUNTER

#define DRM_IOCTL_V3D_PERFMON_GET_COUNTER

Value:

                           DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_PERFMON_GET_COUNTER, \
                           struct drm_v3d_perfmon_get_counter)

DRM_IOCTL_V3D_PERFMON_GET_VALUES

#define DRM_IOCTL_V3D_PERFMON_GET_VALUES

Value:

                           DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_PERFMON_GET_VALUES, \
                           struct drm_v3d_perfmon_get_values)

DRM_IOCTL_V3D_PERFMON_SET_GLOBAL

#define DRM_IOCTL_V3D_PERFMON_SET_GLOBAL

Value:

                           DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_PERFMON_SET_GLOBAL, \
                           struct drm_v3d_perfmon_set_global)

DRM_IOCTL_V3D_SUBMIT_CL

#define DRM_IOCTL_V3D_SUBMIT_CL   DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CL, struct drm_v3d_submit_cl)

DRM_IOCTL_V3D_SUBMIT_CPU

#define DRM_IOCTL_V3D_SUBMIT_CPU   DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CPU, struct drm_v3d_submit_cpu)

DRM_IOCTL_V3D_SUBMIT_CSD

#define DRM_IOCTL_V3D_SUBMIT_CSD   DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CSD, struct drm_v3d_submit_csd)

DRM_IOCTL_V3D_SUBMIT_TFU

#define DRM_IOCTL_V3D_SUBMIT_TFU   DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_TFU, struct drm_v3d_submit_tfu)

DRM_IOCTL_V3D_WAIT_BO

#define DRM_IOCTL_V3D_WAIT_BO   DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_WAIT_BO, struct drm_v3d_wait_bo)

DRM_V3D_CREATE_BO

#define DRM_V3D_CREATE_BO   0x02

DRM_V3D_EXT_ID_CPU_COPY_PERFORMANCE_QUERY

#define DRM_V3D_EXT_ID_CPU_COPY_PERFORMANCE_QUERY   0x07

DRM_V3D_EXT_ID_CPU_COPY_TIMESTAMP_QUERY

#define DRM_V3D_EXT_ID_CPU_COPY_TIMESTAMP_QUERY   0x05

DRM_V3D_EXT_ID_CPU_INDIRECT_CSD

#define DRM_V3D_EXT_ID_CPU_INDIRECT_CSD   0x02

DRM_V3D_EXT_ID_CPU_RESET_PERFORMANCE_QUERY

#define DRM_V3D_EXT_ID_CPU_RESET_PERFORMANCE_QUERY   0x06

DRM_V3D_EXT_ID_CPU_RESET_TIMESTAMP_QUERY

#define DRM_V3D_EXT_ID_CPU_RESET_TIMESTAMP_QUERY   0x04

DRM_V3D_EXT_ID_CPU_TIMESTAMP_QUERY

#define DRM_V3D_EXT_ID_CPU_TIMESTAMP_QUERY   0x03

DRM_V3D_EXT_ID_MULTI_SYNC

#define DRM_V3D_EXT_ID_MULTI_SYNC   0x01

DRM_V3D_GET_BO_OFFSET

#define DRM_V3D_GET_BO_OFFSET   0x05

DRM_V3D_GET_PARAM

#define DRM_V3D_GET_PARAM   0x04

DRM_V3D_MAX_PERF_COUNTERS

#define DRM_V3D_MAX_PERF_COUNTERS   32

DRM_V3D_MMAP_BO

#define DRM_V3D_MMAP_BO   0x03

DRM_V3D_PERFCNT_MAX_CATEGORY

#define DRM_V3D_PERFCNT_MAX_CATEGORY   32

DRM_V3D_PERFCNT_MAX_DESCRIPTION

#define DRM_V3D_PERFCNT_MAX_DESCRIPTION   256

DRM_V3D_PERFCNT_MAX_NAME

#define DRM_V3D_PERFCNT_MAX_NAME   64

DRM_V3D_PERFMON_CLEAR_GLOBAL

#define DRM_V3D_PERFMON_CLEAR_GLOBAL   0x0001

DRM_V3D_PERFMON_CREATE

#define DRM_V3D_PERFMON_CREATE   0x08

DRM_V3D_PERFMON_DESTROY

#define DRM_V3D_PERFMON_DESTROY   0x09

DRM_V3D_PERFMON_GET_COUNTER

#define DRM_V3D_PERFMON_GET_COUNTER   0x0c

DRM_V3D_PERFMON_GET_VALUES

#define DRM_V3D_PERFMON_GET_VALUES   0x0a

DRM_V3D_PERFMON_SET_GLOBAL

#define DRM_V3D_PERFMON_SET_GLOBAL   0x0d

DRM_V3D_SUBMIT_CL

#define DRM_V3D_SUBMIT_CL   0x00

DRM_V3D_SUBMIT_CL_FLUSH_CACHE

#define DRM_V3D_SUBMIT_CL_FLUSH_CACHE   0x01

DRM_V3D_SUBMIT_CPU

#define DRM_V3D_SUBMIT_CPU   0x0b

DRM_V3D_SUBMIT_CSD

#define DRM_V3D_SUBMIT_CSD   0x07

DRM_V3D_SUBMIT_EXTENSION

#define DRM_V3D_SUBMIT_EXTENSION   0x02

DRM_V3D_SUBMIT_TFU

#define DRM_V3D_SUBMIT_TFU   0x06

DRM_V3D_WAIT_BO

#define DRM_V3D_WAIT_BO   0x01

Enumeration Type Documentation

anonymous enum

anonymous enum

Enumerator
V3D_PERFCNT_FEP_VALID_PRIMTS_NO_PIXELS
V3D_PERFCNT_FEP_VALID_PRIMS
V3D_PERFCNT_FEP_EZ_NFCLIP_QUADS
V3D_PERFCNT_FEP_VALID_QUADS
V3D_PERFCNT_TLB_QUADS_STENCIL_FAIL
V3D_PERFCNT_TLB_QUADS_STENCILZ_FAIL
V3D_PERFCNT_TLB_QUADS_STENCILZ_PASS
V3D_PERFCNT_TLB_QUADS_ZERO_COV
V3D_PERFCNT_TLB_QUADS_NONZERO_COV
V3D_PERFCNT_TLB_QUADS_WRITTEN
V3D_PERFCNT_PTB_PRIM_VIEWPOINT_DISCARD
V3D_PERFCNT_PTB_PRIM_CLIP
V3D_PERFCNT_PTB_PRIM_REV
V3D_PERFCNT_QPU_IDLE_CYCLES
V3D_PERFCNT_QPU_ACTIVE_CYCLES_VERTEX_COORD_USER
V3D_PERFCNT_QPU_ACTIVE_CYCLES_FRAG
V3D_PERFCNT_QPU_CYCLES_VALID_INSTR
V3D_PERFCNT_QPU_CYCLES_TMU_STALL
V3D_PERFCNT_QPU_CYCLES_SCOREBOARD_STALL
V3D_PERFCNT_QPU_CYCLES_VARYINGS_STALL
V3D_PERFCNT_QPU_IC_HIT
V3D_PERFCNT_QPU_IC_MISS
V3D_PERFCNT_QPU_UC_HIT
V3D_PERFCNT_QPU_UC_MISS
V3D_PERFCNT_TMU_TCACHE_ACCESS
V3D_PERFCNT_TMU_TCACHE_MISS
V3D_PERFCNT_VPM_VDW_STALL
V3D_PERFCNT_VPM_VCD_STALL
V3D_PERFCNT_BIN_ACTIVE
V3D_PERFCNT_RDR_ACTIVE
V3D_PERFCNT_L2T_HITS
V3D_PERFCNT_L2T_MISSES
V3D_PERFCNT_CYCLE_COUNT
V3D_PERFCNT_QPU_CYCLES_STALLED_VERTEX_COORD_USER
V3D_PERFCNT_QPU_CYCLES_STALLED_FRAGMENT
V3D_PERFCNT_PTB_PRIMS_BINNED
V3D_PERFCNT_AXI_WRITES_WATCH_0
V3D_PERFCNT_AXI_READS_WATCH_0
V3D_PERFCNT_AXI_WRITE_STALLS_WATCH_0
V3D_PERFCNT_AXI_READ_STALLS_WATCH_0
V3D_PERFCNT_AXI_WRITE_BYTES_WATCH_0
V3D_PERFCNT_AXI_READ_BYTES_WATCH_0
V3D_PERFCNT_AXI_WRITES_WATCH_1
V3D_PERFCNT_AXI_READS_WATCH_1
V3D_PERFCNT_AXI_WRITE_STALLS_WATCH_1
V3D_PERFCNT_AXI_READ_STALLS_WATCH_1
V3D_PERFCNT_AXI_WRITE_BYTES_WATCH_1
V3D_PERFCNT_AXI_READ_BYTES_WATCH_1
V3D_PERFCNT_TLB_PARTIAL_QUADS
V3D_PERFCNT_TMU_CONFIG_ACCESSES
V3D_PERFCNT_L2T_NO_ID_STALL
V3D_PERFCNT_L2T_COM_QUE_STALL
V3D_PERFCNT_L2T_TMU_WRITES
V3D_PERFCNT_TMU_ACTIVE_CYCLES
V3D_PERFCNT_TMU_STALLED_CYCLES
V3D_PERFCNT_CLE_ACTIVE
V3D_PERFCNT_L2T_TMU_READS
V3D_PERFCNT_L2T_CLE_READS
V3D_PERFCNT_L2T_VCD_READS
V3D_PERFCNT_L2T_TMUCFG_READS
V3D_PERFCNT_L2T_SLC0_READS
V3D_PERFCNT_L2T_SLC1_READS
V3D_PERFCNT_L2T_SLC2_READS
V3D_PERFCNT_L2T_TMU_W_MISSES
V3D_PERFCNT_L2T_TMU_R_MISSES
V3D_PERFCNT_L2T_CLE_MISSES
V3D_PERFCNT_L2T_VCD_MISSES
V3D_PERFCNT_L2T_TMUCFG_MISSES
V3D_PERFCNT_L2T_SLC0_MISSES
V3D_PERFCNT_L2T_SLC1_MISSES
V3D_PERFCNT_L2T_SLC2_MISSES
V3D_PERFCNT_CORE_MEM_WRITES
V3D_PERFCNT_L2T_MEM_WRITES
V3D_PERFCNT_PTB_MEM_WRITES
V3D_PERFCNT_TLB_MEM_WRITES
V3D_PERFCNT_CORE_MEM_READS
V3D_PERFCNT_L2T_MEM_READS
V3D_PERFCNT_PTB_MEM_READS
V3D_PERFCNT_PSE_MEM_READS
V3D_PERFCNT_TLB_MEM_READS
V3D_PERFCNT_GMP_MEM_READS
V3D_PERFCNT_PTB_W_MEM_WORDS
V3D_PERFCNT_TLB_W_MEM_WORDS
V3D_PERFCNT_PSE_R_MEM_WORDS
V3D_PERFCNT_TLB_R_MEM_WORDS
V3D_PERFCNT_TMU_MRU_HITS
V3D_PERFCNT_COMPUTE_ACTIVE
V3D_PERFCNT_NUM

drm_v3d_param

enum drm_v3d_param

Enumerator
DRM_V3D_PARAM_V3D_UIFCFG
DRM_V3D_PARAM_V3D_HUB_IDENT1
DRM_V3D_PARAM_V3D_HUB_IDENT2
DRM_V3D_PARAM_V3D_HUB_IDENT3
DRM_V3D_PARAM_V3D_CORE0_IDENT0
DRM_V3D_PARAM_V3D_CORE0_IDENT1
DRM_V3D_PARAM_V3D_CORE0_IDENT2
DRM_V3D_PARAM_SUPPORTS_TFU
DRM_V3D_PARAM_SUPPORTS_CSD
DRM_V3D_PARAM_SUPPORTS_CACHE_FLUSH
DRM_V3D_PARAM_SUPPORTS_PERFMON
DRM_V3D_PARAM_SUPPORTS_MULTISYNC_EXT
DRM_V3D_PARAM_SUPPORTS_CPU_QUEUE
DRM_V3D_PARAM_MAX_PERF_COUNTERS
DRM_V3D_PARAM_SUPPORTS_SUPER_PAGES
DRM_V3D_PARAM_GLOBAL_RESET_COUNTER
DRM_V3D_PARAM_CONTEXT_RESET_COUNTER

v3d_queue

enum v3d_queue

Enumerator
V3D_BIN
V3D_RENDER
V3D_TFU
V3D_CSD
V3D_CACHE_CLEAN
V3D_CPU