#include "drm.h"

Include dependency graph for xe_drm.h:

Classes
struct	drm_xe_user_extension

struct	drm_xe_ext_set_property

struct	drm_xe_engine_class_instance

struct	drm_xe_engine

struct	drm_xe_query_engines

struct	drm_xe_mem_region

struct	drm_xe_query_mem_regions

struct	drm_xe_query_config

struct	drm_xe_gt

struct	drm_xe_query_gt_list

struct	drm_xe_query_topology_mask

struct	drm_xe_query_engine_cycles

struct	drm_xe_query_uc_fw_version

struct	drm_xe_query_pxp_status

struct	drm_xe_device_query

struct	drm_xe_gem_create

struct	drm_xe_gem_mmap_offset

struct	drm_xe_vm_create

struct	drm_xe_vm_destroy

struct	drm_xe_vm_bind_op

struct	drm_xe_vm_bind

struct	xe_vm_fault

struct	drm_xe_vm_get_property

struct	drm_xe_exec_queue_create

struct	drm_xe_exec_queue_destroy

struct	drm_xe_exec_queue_get_property

struct	drm_xe_sync

struct	drm_xe_exec

struct	drm_xe_wait_user_fence

struct	drm_xe_observation_param

struct	drm_xe_oa_unit

struct	drm_xe_query_oa_units

struct	drm_xe_oa_config

struct	drm_xe_oa_stream_status

struct	drm_xe_oa_stream_info

struct	drm_xe_query_eu_stall

struct	drm_xe_madvise

struct	drm_xe_mem_range_attr

struct	drm_xe_vm_query_mem_range_attr

struct	drm_xe_exec_queue_set_property

Macros
#define	DRM_XE_DEVICE_QUERY 0x00

#define	DRM_XE_GEM_CREATE 0x01

#define	DRM_XE_GEM_MMAP_OFFSET 0x02

#define	DRM_XE_VM_CREATE 0x03

#define	DRM_XE_VM_DESTROY 0x04

#define	DRM_XE_VM_BIND 0x05

#define	DRM_XE_EXEC_QUEUE_CREATE 0x06

#define	DRM_XE_EXEC_QUEUE_DESTROY 0x07

#define	DRM_XE_EXEC_QUEUE_GET_PROPERTY 0x08

#define	DRM_XE_EXEC 0x09

#define	DRM_XE_WAIT_USER_FENCE 0x0a

#define	DRM_XE_OBSERVATION 0x0b

#define	DRM_XE_MADVISE 0x0c

#define	DRM_XE_VM_QUERY_MEM_RANGE_ATTRS 0x0d

#define	DRM_XE_EXEC_QUEUE_SET_PROPERTY 0x0e

#define	DRM_XE_VM_GET_PROPERTY 0x0f

#define	DRM_IOCTL_XE_DEVICE_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)

#define	DRM_IOCTL_XE_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_CREATE, struct drm_xe_gem_create)

#define	DRM_IOCTL_XE_GEM_MMAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_MMAP_OFFSET, struct drm_xe_gem_mmap_offset)

#define	DRM_IOCTL_XE_VM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_CREATE, struct drm_xe_vm_create)

#define	DRM_IOCTL_XE_VM_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)

#define	DRM_IOCTL_XE_VM_BIND DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)

#define	DRM_IOCTL_XE_EXEC_QUEUE_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_CREATE, struct drm_xe_exec_queue_create)

#define	DRM_IOCTL_XE_EXEC_QUEUE_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_DESTROY, struct drm_xe_exec_queue_destroy)

#define	DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_GET_PROPERTY, struct drm_xe_exec_queue_get_property)

#define	DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)

#define	DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)

#define	DRM_IOCTL_XE_OBSERVATION DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OBSERVATION, struct drm_xe_observation_param)

#define	DRM_IOCTL_XE_MADVISE DRM_IOW(DRM_COMMAND_BASE + DRM_XE_MADVISE, struct drm_xe_madvise)

#define	DRM_IOCTL_XE_VM_QUERY_MEM_RANGE_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_QUERY_MEM_RANGE_ATTRS, struct drm_xe_vm_query_mem_range_attr)

#define	DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)

#define	DRM_IOCTL_XE_VM_GET_PROPERTY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_GET_PROPERTY, struct drm_xe_vm_get_property)

#define	DRM_XE_ENGINE_CLASS_RENDER 0

#define	DRM_XE_ENGINE_CLASS_COPY 1

#define	DRM_XE_ENGINE_CLASS_VIDEO_DECODE 2

#define	DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE 3

#define	DRM_XE_ENGINE_CLASS_COMPUTE 4

#define	DRM_XE_ENGINE_CLASS_VM_BIND 5

#define	DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0

#define	DRM_XE_QUERY_CONFIG_FLAGS 1

#define	DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM (1 << 0)

#define	DRM_XE_QUERY_CONFIG_FLAG_HAS_LOW_LATENCY (1 << 1)

#define	DRM_XE_QUERY_CONFIG_FLAG_HAS_CPU_ADDR_MIRROR (1 << 2)

#define	DRM_XE_QUERY_CONFIG_FLAG_HAS_NO_COMPRESSION_HINT (1 << 3)

#define	DRM_XE_QUERY_CONFIG_FLAG_HAS_DISABLE_STATE_CACHE_PERF_FIX (1 << 4)

#define	DRM_XE_QUERY_CONFIG_FLAG_HAS_PURGING_SUPPORT (1 << 5)

#define	DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT 2

#define	DRM_XE_QUERY_CONFIG_VA_BITS 3

#define	DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 4

#define	DRM_XE_QUERY_GT_TYPE_MAIN 0

#define	DRM_XE_QUERY_GT_TYPE_MEDIA 1

#define	DRM_XE_TOPO_DSS_GEOMETRY 1

#define	DRM_XE_TOPO_DSS_COMPUTE 2

#define	DRM_XE_TOPO_L3_BANK 3

#define	DRM_XE_TOPO_EU_PER_DSS 4

#define	DRM_XE_TOPO_SIMD16_EU_PER_DSS 5

#define	XE_QUERY_UC_TYPE_GUC_SUBMISSION 0

#define	XE_QUERY_UC_TYPE_HUC 1

#define	DRM_XE_DEVICE_QUERY_ENGINES 0

#define	DRM_XE_DEVICE_QUERY_MEM_REGIONS 1

#define	DRM_XE_DEVICE_QUERY_CONFIG 2

#define	DRM_XE_DEVICE_QUERY_GT_LIST 3

#define	DRM_XE_DEVICE_QUERY_HWCONFIG 4

#define	DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5

#define	DRM_XE_DEVICE_QUERY_ENGINE_CYCLES 6

#define	DRM_XE_DEVICE_QUERY_UC_FW_VERSION 7

#define	DRM_XE_DEVICE_QUERY_OA_UNITS 8

#define	DRM_XE_DEVICE_QUERY_PXP_STATUS 9

#define	DRM_XE_DEVICE_QUERY_EU_STALL 10

#define	DRM_XE_GEM_CREATE_EXTENSION_SET_PROPERTY 0

#define	DRM_XE_GEM_CREATE_SET_PROPERTY_PXP_TYPE 0

#define	DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (1 << 0)

#define	DRM_XE_GEM_CREATE_FLAG_SCANOUT (1 << 1)

#define	DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (1 << 2)

#define	DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION (1 << 3)

#define	DRM_XE_GEM_CPU_CACHING_WB 1

#define	DRM_XE_GEM_CPU_CACHING_WC 2

#define	DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER (1 << 0)

#define	DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE (1 << 0)

#define	DRM_XE_VM_CREATE_FLAG_LR_MODE (1 << 1)

#define	DRM_XE_VM_CREATE_FLAG_FAULT_MODE (1 << 2)

#define	DRM_XE_VM_CREATE_FLAG_NO_VM_OVERCOMMIT (1 << 3)

#define	DRM_XE_VM_BIND_OP_MAP 0x0

#define	DRM_XE_VM_BIND_OP_UNMAP 0x1

#define	DRM_XE_VM_BIND_OP_MAP_USERPTR 0x2

#define	DRM_XE_VM_BIND_OP_UNMAP_ALL 0x3

#define	DRM_XE_VM_BIND_OP_PREFETCH 0x4

#define	DRM_XE_VM_BIND_FLAG_READONLY (1 << 0)

#define	DRM_XE_VM_BIND_FLAG_IMMEDIATE (1 << 1)

#define	DRM_XE_VM_BIND_FLAG_NULL (1 << 2)

#define	DRM_XE_VM_BIND_FLAG_DUMPABLE (1 << 3)

#define	DRM_XE_VM_BIND_FLAG_CHECK_PXP (1 << 4)

#define	DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR (1 << 5)

#define	DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET (1 << 6)

#define	DRM_XE_VM_BIND_FLAG_DECOMPRESS (1 << 7)

#define	DRM_XE_CONSULT_MEM_ADVISE_PREF_LOC -1

#define	FAULT_ACCESS_TYPE_READ 0

#define	FAULT_ACCESS_TYPE_WRITE 1

#define	FAULT_ACCESS_TYPE_ATOMIC 2

#define	FAULT_TYPE_NOT_PRESENT 0

#define	FAULT_TYPE_WRITE_ACCESS 1

#define	FAULT_TYPE_ATOMIC_ACCESS 2

#define	FAULT_LEVEL_PTE 0

#define	FAULT_LEVEL_PDE 1

#define	FAULT_LEVEL_PDP 2

#define	FAULT_LEVEL_PML4 3

#define	FAULT_LEVEL_PML5 4

#define	DRM_XE_VM_GET_PROPERTY_FAULTS 0

#define	DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY 0

#define	DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY 0

#define	DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE 1

#define	DRM_XE_EXEC_QUEUE_SET_PROPERTY_PXP_TYPE 2

#define	DRM_XE_EXEC_QUEUE_SET_HANG_REPLAY_STATE 3

#define	DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_GROUP 4

#define	DRM_XE_MULTI_GROUP_CREATE (1ull << 63)

#define	DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE_PRIORITY 5

#define	DRM_XE_EXEC_QUEUE_SET_DISABLE_STATE_CACHE_PERF_FIX 6

#define	DRM_XE_EXEC_QUEUE_LOW_LATENCY_HINT (1 << 0)

#define	DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN 0

#define	DRM_XE_SYNC_TYPE_SYNCOBJ 0x0

#define	DRM_XE_SYNC_TYPE_TIMELINE_SYNCOBJ 0x1

#define	DRM_XE_SYNC_TYPE_USER_FENCE 0x2

#define	DRM_XE_SYNC_FLAG_SIGNAL (1 << 0)

#define	DRM_XE_MAX_SYNCS 1024

#define	DRM_XE_UFENCE_WAIT_OP_EQ 0x0

#define	DRM_XE_UFENCE_WAIT_OP_NEQ 0x1

#define	DRM_XE_UFENCE_WAIT_OP_GT 0x2

#define	DRM_XE_UFENCE_WAIT_OP_GTE 0x3

#define	DRM_XE_UFENCE_WAIT_OP_LT 0x4

#define	DRM_XE_UFENCE_WAIT_OP_LTE 0x5

#define	DRM_XE_UFENCE_WAIT_FLAG_ABSTIME (1 << 0)

#define	DRM_XE_OA_CAPS_BASE (1 << 0)

#define	DRM_XE_OA_CAPS_SYNCS (1 << 1)

#define	DRM_XE_OA_CAPS_OA_BUFFER_SIZE (1 << 2)

#define	DRM_XE_OA_CAPS_WAIT_NUM_REPORTS (1 << 3)

#define	DRM_XE_OA_CAPS_OAM (1 << 4)

#define	DRM_XE_OA_CAPS_OA_UNIT_GT_ID (1 << 5)

#define	DRM_XE_OA_EXTENSION_SET_PROPERTY 0

#define	DRM_XE_OA_FORMAT_MASK_FMT_TYPE (0xffu << 0)

#define	DRM_XE_OA_FORMAT_MASK_COUNTER_SEL (0xffu << 8)

#define	DRM_XE_OA_FORMAT_MASK_COUNTER_SIZE (0xffu << 16)

#define	DRM_XE_OA_FORMAT_MASK_BC_REPORT (0xffu << 24)

#define	DRM_XE_OASTATUS_MMIO_TRG_Q_FULL (1 << 3)

#define	DRM_XE_OASTATUS_COUNTER_OVERFLOW (1 << 2)

#define	DRM_XE_OASTATUS_BUFFER_OVERFLOW (1 << 1)

#define	DRM_XE_OASTATUS_REPORT_LOST (1 << 0)

#define	DRM_XE_PXP_HWDRM_DEFAULT_SESSION 0xf

#define	DRM_XE_EU_STALL_EXTENSION_SET_PROPERTY 0

#define	DRM_XE_EU_STALL_CAPS_BASE (1 << 0)

#define	DRM_XE_MEM_RANGE_ATTR_PREFERRED_LOC 0

#define	DRM_XE_MEM_RANGE_ATTR_ATOMIC 1

#define	DRM_XE_MEM_RANGE_ATTR_PAT 2

#define	DRM_XE_VMA_ATTR_PURGEABLE_STATE 3

#define	DRM_XE_PREFERRED_LOC_DEFAULT_DEVICE 0

#define	DRM_XE_PREFERRED_LOC_DEFAULT_SYSTEM -1

#define	DRM_XE_MIGRATE_ALL_PAGES 0

#define	DRM_XE_MIGRATE_ONLY_SYSTEM_PAGES 1

#define	DRM_XE_ATOMIC_UNDEFINED 0

#define	DRM_XE_ATOMIC_DEVICE 1

#define	DRM_XE_ATOMIC_GLOBAL 2

#define	DRM_XE_ATOMIC_CPU 3

#define	DRM_XE_VMA_PURGEABLE_STATE_WILLNEED 0

#define	DRM_XE_VMA_PURGEABLE_STATE_DONTNEED 1

#define	DRM_XE_RAS_ERROR_SEVERITY_NAMES

#define	DRM_XE_RAS_ERROR_COMPONENT_NAMES

Enumerations
enum	drm_xe_memory_class { DRM_XE_MEM_REGION_CLASS_SYSMEM = 0 , DRM_XE_MEM_REGION_CLASS_VRAM }

enum	drm_xe_observation_type { DRM_XE_OBSERVATION_TYPE_OA , DRM_XE_OBSERVATION_TYPE_EU_STALL }

enum	drm_xe_observation_op { DRM_XE_OBSERVATION_OP_STREAM_OPEN , DRM_XE_OBSERVATION_OP_ADD_CONFIG , DRM_XE_OBSERVATION_OP_REMOVE_CONFIG }

enum	drm_xe_observation_ioctls { DRM_XE_OBSERVATION_IOCTL_ENABLE = _IO('i', 0x0) , DRM_XE_OBSERVATION_IOCTL_DISABLE = _IO('i', 0x1) , DRM_XE_OBSERVATION_IOCTL_CONFIG = _IO('i', 0x2) , DRM_XE_OBSERVATION_IOCTL_STATUS = _IO('i', 0x3) , DRM_XE_OBSERVATION_IOCTL_INFO = _IO('i', 0x4) }

enum	drm_xe_oa_unit_type { DRM_XE_OA_UNIT_TYPE_OAG , DRM_XE_OA_UNIT_TYPE_OAM , DRM_XE_OA_UNIT_TYPE_OAM_SAG , DRM_XE_OA_UNIT_TYPE_MERT }

enum	drm_xe_oa_format_type { DRM_XE_OA_FMT_TYPE_OAG , DRM_XE_OA_FMT_TYPE_OAR , DRM_XE_OA_FMT_TYPE_OAM , DRM_XE_OA_FMT_TYPE_OAC , DRM_XE_OA_FMT_TYPE_OAM_MPEC , DRM_XE_OA_FMT_TYPE_PEC }

enum	drm_xe_oa_property_id { DRM_XE_OA_PROPERTY_OA_UNIT_ID = 1 , DRM_XE_OA_PROPERTY_SAMPLE_OA , DRM_XE_OA_PROPERTY_OA_METRIC_SET , DRM_XE_OA_PROPERTY_OA_FORMAT , DRM_XE_OA_PROPERTY_OA_PERIOD_EXPONENT , DRM_XE_OA_PROPERTY_OA_DISABLED , DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID , DRM_XE_OA_PROPERTY_OA_ENGINE_INSTANCE , DRM_XE_OA_PROPERTY_NO_PREEMPT , DRM_XE_OA_PROPERTY_NUM_SYNCS , DRM_XE_OA_PROPERTY_SYNCS , DRM_XE_OA_PROPERTY_OA_BUFFER_SIZE , DRM_XE_OA_PROPERTY_WAIT_NUM_REPORTS }

enum	drm_xe_pxp_session_type { DRM_XE_PXP_TYPE_NONE = 0 , DRM_XE_PXP_TYPE_HWDRM = 1 }

enum	drm_xe_eu_stall_property_id { DRM_XE_EU_STALL_PROP_GT_ID = 1 , DRM_XE_EU_STALL_PROP_SAMPLE_RATE , DRM_XE_EU_STALL_PROP_WAIT_NUM_REPORTS }

enum	drm_xe_ras_error_severity { DRM_XE_RAS_ERR_SEV_CORRECTABLE = 0 , DRM_XE_RAS_ERR_SEV_UNCORRECTABLE , DRM_XE_RAS_ERR_SEV_MAX }

enum	drm_xe_ras_error_component { DRM_XE_RAS_ERR_COMP_CORE_COMPUTE = 1 , DRM_XE_RAS_ERR_COMP_SOC_INTERNAL , DRM_XE_RAS_ERR_COMP_MAX }

Macro Definition Documentation

◆ DRM_IOCTL_XE_DEVICE_QUERY

#define DRM_IOCTL_XE_DEVICE_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)

◆ DRM_IOCTL_XE_EXEC

#define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)

◆ DRM_IOCTL_XE_EXEC_QUEUE_CREATE

#define DRM_IOCTL_XE_EXEC_QUEUE_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_CREATE, struct drm_xe_exec_queue_create)

◆ DRM_IOCTL_XE_EXEC_QUEUE_DESTROY

#define DRM_IOCTL_XE_EXEC_QUEUE_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_DESTROY, struct drm_xe_exec_queue_destroy)

◆ DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY

#define DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_GET_PROPERTY, struct drm_xe_exec_queue_get_property)

◆ DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY

#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)

◆ DRM_IOCTL_XE_GEM_CREATE

#define DRM_IOCTL_XE_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_CREATE, struct drm_xe_gem_create)

◆ DRM_IOCTL_XE_GEM_MMAP_OFFSET

#define DRM_IOCTL_XE_GEM_MMAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_MMAP_OFFSET, struct drm_xe_gem_mmap_offset)

◆ DRM_IOCTL_XE_MADVISE

#define DRM_IOCTL_XE_MADVISE DRM_IOW(DRM_COMMAND_BASE + DRM_XE_MADVISE, struct drm_xe_madvise)

◆ DRM_IOCTL_XE_OBSERVATION

#define DRM_IOCTL_XE_OBSERVATION DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OBSERVATION, struct drm_xe_observation_param)

◆ DRM_IOCTL_XE_VM_BIND

#define DRM_IOCTL_XE_VM_BIND DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)

◆ DRM_IOCTL_XE_VM_CREATE

#define DRM_IOCTL_XE_VM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_CREATE, struct drm_xe_vm_create)

◆ DRM_IOCTL_XE_VM_DESTROY

#define DRM_IOCTL_XE_VM_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)

◆ DRM_IOCTL_XE_VM_GET_PROPERTY

#define DRM_IOCTL_XE_VM_GET_PROPERTY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_GET_PROPERTY, struct drm_xe_vm_get_property)

◆ DRM_IOCTL_XE_VM_QUERY_MEM_RANGE_ATTRS

#define DRM_IOCTL_XE_VM_QUERY_MEM_RANGE_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_QUERY_MEM_RANGE_ATTRS, struct drm_xe_vm_query_mem_range_attr)

◆ DRM_IOCTL_XE_WAIT_USER_FENCE

#define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)

◆ DRM_XE_ATOMIC_CPU

#define DRM_XE_ATOMIC_CPU 3

◆ DRM_XE_ATOMIC_DEVICE

#define DRM_XE_ATOMIC_DEVICE 1

◆ DRM_XE_ATOMIC_GLOBAL

#define DRM_XE_ATOMIC_GLOBAL 2

◆ DRM_XE_ATOMIC_UNDEFINED

#define DRM_XE_ATOMIC_UNDEFINED 0

◆ DRM_XE_CONSULT_MEM_ADVISE_PREF_LOC

#define DRM_XE_CONSULT_MEM_ADVISE_PREF_LOC -1

◆ DRM_XE_DEVICE_QUERY

#define DRM_XE_DEVICE_QUERY 0x00

DOC: Xe Device Block Diagram

The diagram below represents a high-level simplification of a discrete GPU supported by the Xe driver. It shows some device components which are necessary to understand this API, as well as how their relations to each other. This diagram does not represent real hardware::

┌──────────────────────────────────────────────────────────────────┐ │ ┌──────────────────────────────────────────────────┐ ┌─────────┐ │ │ │ ┌───────────────────────┐ ┌─────┐ │ │ ┌─────┐ │ │ │ │ │ VRAM0 ├───┤ ... │ │ │ │VRAM1│ │ │ │ │ └───────────┬───────────┘ └─GT1─┘ │ │ └──┬──┘ │ │ │ │ ┌──────────────────┴───────────────────────────┐ │ │ ┌──┴──┐ │ │ │ │ │ ┌─────────────────────┐ ┌─────────────────┐ │ │ │ │ │ │ │ │ │ │ │ ┌──┐ ┌──┐ ┌──┐ ┌──┐ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │ │ │ │ │ │EU│ │EU│ │EU│ │EU│ │ │ │RCS0 │ │BCS0 │ │ │ │ │ │ │ │ │ │ │ │ │ └──┘ └──┘ └──┘ └──┘ │ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │ │ │ │ │ ┌──┐ ┌──┐ ┌──┐ ┌──┐ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │ │ │ │ │ │EU│ │EU│ │EU│ │EU│ │ │ │VCS0 │ │VCS1 │ │ │ │ │ │ │ │ │ │ │ │ │ └──┘ └──┘ └──┘ └──┘ │ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │ │ │ │ │ ┌──┐ ┌──┐ ┌──┐ ┌──┐ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │ │ │ │ │ │EU│ │EU│ │EU│ │EU│ │ │ │VECS0│ │VECS1│ │ │ │ │ │ ... │ │ │ │ │ │ │ └──┘ └──┘ └──┘ └──┘ │ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │ │ │ │ │ ┌──┐ ┌──┐ ┌──┐ ┌──┐ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │ │ │ │ │ │EU│ │EU│ │EU│ │EU│ │ │ │CCS0 │ │CCS1 │ │ │ │ │ │ │ │ │ │ │ │ │ └──┘ └──┘ └──┘ └──┘ │ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │ │ │ │ └─────────DSS─────────┘ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │ │ │ │ │ │CCS2 │ │CCS3 │ │ │ │ │ │ │ │ │ │ │ │ ┌─────┐ ┌─────┐ ┌─────┐ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │ │ │ │ │ ... │ │ ... │ │ ... │ │ │ │ │ │ │ │ │ │ │ │ │ └─DSS─┘ └─DSS─┘ └─DSS─┘ └─────Engines─────┘ │ │ │ │ │ │ │ │ │ └───────────────────────────GT0────────────────┘ │ │ └─GT2─┘ │ │ │ └────────────────────────────Tile0─────────────────┘ └─ Tile1──┘ │ └─────────────────────────────Device0───────┬──────────────────────┘ │ ───────────────────────┴────────── PCI bus DOC: Xe uAPI Overview

This section aims to describe the Xe's IOCTL entries, its structs, and other Xe related uAPI such as uevents and PMU (Platform Monitoring Unit) related entries and usage.

List of supported IOCTLs:

&DRM_IOCTL_XE_DEVICE_QUERY
&DRM_IOCTL_XE_GEM_CREATE
&DRM_IOCTL_XE_GEM_MMAP_OFFSET
&DRM_IOCTL_XE_VM_CREATE
&DRM_IOCTL_XE_VM_DESTROY
&DRM_IOCTL_XE_VM_BIND
&DRM_IOCTL_XE_EXEC_QUEUE_CREATE
&DRM_IOCTL_XE_EXEC_QUEUE_DESTROY
&DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY
&DRM_IOCTL_XE_EXEC
&DRM_IOCTL_XE_WAIT_USER_FENCE
&DRM_IOCTL_XE_OBSERVATION
&DRM_IOCTL_XE_MADVISE
&DRM_IOCTL_XE_VM_QUERY_MEM_RANGE_ATTRS
&DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY
&DRM_IOCTL_XE_VM_GET_PROPERTY

◆ DRM_XE_DEVICE_QUERY_CONFIG

#define DRM_XE_DEVICE_QUERY_CONFIG 2

◆ DRM_XE_DEVICE_QUERY_ENGINE_CYCLES

#define DRM_XE_DEVICE_QUERY_ENGINE_CYCLES 6

◆ DRM_XE_DEVICE_QUERY_ENGINES

#define DRM_XE_DEVICE_QUERY_ENGINES 0

◆ DRM_XE_DEVICE_QUERY_EU_STALL

#define DRM_XE_DEVICE_QUERY_EU_STALL 10

◆ DRM_XE_DEVICE_QUERY_GT_LIST

#define DRM_XE_DEVICE_QUERY_GT_LIST 3

◆ DRM_XE_DEVICE_QUERY_GT_TOPOLOGY

#define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5

◆ DRM_XE_DEVICE_QUERY_HWCONFIG

#define DRM_XE_DEVICE_QUERY_HWCONFIG 4

◆ DRM_XE_DEVICE_QUERY_MEM_REGIONS

#define DRM_XE_DEVICE_QUERY_MEM_REGIONS 1

◆ DRM_XE_DEVICE_QUERY_OA_UNITS

#define DRM_XE_DEVICE_QUERY_OA_UNITS 8

◆ DRM_XE_DEVICE_QUERY_PXP_STATUS

#define DRM_XE_DEVICE_QUERY_PXP_STATUS 9

◆ DRM_XE_DEVICE_QUERY_UC_FW_VERSION

#define DRM_XE_DEVICE_QUERY_UC_FW_VERSION 7

◆ DRM_XE_ENGINE_CLASS_COMPUTE

#define DRM_XE_ENGINE_CLASS_COMPUTE 4

◆ DRM_XE_ENGINE_CLASS_COPY

#define DRM_XE_ENGINE_CLASS_COPY 1

◆ DRM_XE_ENGINE_CLASS_RENDER

#define DRM_XE_ENGINE_CLASS_RENDER 0

◆ DRM_XE_ENGINE_CLASS_VIDEO_DECODE

#define DRM_XE_ENGINE_CLASS_VIDEO_DECODE 2

◆ DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE

#define DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE 3

◆ DRM_XE_ENGINE_CLASS_VM_BIND

#define DRM_XE_ENGINE_CLASS_VM_BIND 5

◆ DRM_XE_EU_STALL_CAPS_BASE

#define DRM_XE_EU_STALL_CAPS_BASE (1 << 0)

◆ DRM_XE_EU_STALL_EXTENSION_SET_PROPERTY

#define DRM_XE_EU_STALL_EXTENSION_SET_PROPERTY 0

◆ DRM_XE_EXEC

#define DRM_XE_EXEC 0x09

◆ DRM_XE_EXEC_QUEUE_CREATE

#define DRM_XE_EXEC_QUEUE_CREATE 0x06

◆ DRM_XE_EXEC_QUEUE_DESTROY

#define DRM_XE_EXEC_QUEUE_DESTROY 0x07

◆ DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY

#define DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY 0

◆ DRM_XE_EXEC_QUEUE_GET_PROPERTY

#define DRM_XE_EXEC_QUEUE_GET_PROPERTY 0x08

◆ DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN

#define DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN 0

◆ DRM_XE_EXEC_QUEUE_LOW_LATENCY_HINT

#define DRM_XE_EXEC_QUEUE_LOW_LATENCY_HINT (1 << 0)

◆ DRM_XE_EXEC_QUEUE_SET_DISABLE_STATE_CACHE_PERF_FIX

#define DRM_XE_EXEC_QUEUE_SET_DISABLE_STATE_CACHE_PERF_FIX 6

◆ DRM_XE_EXEC_QUEUE_SET_HANG_REPLAY_STATE

#define DRM_XE_EXEC_QUEUE_SET_HANG_REPLAY_STATE 3

◆ DRM_XE_EXEC_QUEUE_SET_PROPERTY

#define DRM_XE_EXEC_QUEUE_SET_PROPERTY 0x0e

◆ DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_GROUP

#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_GROUP 4

◆ DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE_PRIORITY

#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE_PRIORITY 5

◆ DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY

#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY 0

◆ DRM_XE_EXEC_QUEUE_SET_PROPERTY_PXP_TYPE

#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PXP_TYPE 2

◆ DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE

#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE 1

◆ DRM_XE_GEM_CPU_CACHING_WB

#define DRM_XE_GEM_CPU_CACHING_WB 1

◆ DRM_XE_GEM_CPU_CACHING_WC

#define DRM_XE_GEM_CPU_CACHING_WC 2

◆ DRM_XE_GEM_CREATE

#define DRM_XE_GEM_CREATE 0x01

◆ DRM_XE_GEM_CREATE_EXTENSION_SET_PROPERTY

#define DRM_XE_GEM_CREATE_EXTENSION_SET_PROPERTY 0

◆ DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING

#define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (1 << 0)

◆ DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM

#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (1 << 2)

◆ DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION

#define DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION (1 << 3)

◆ DRM_XE_GEM_CREATE_FLAG_SCANOUT

#define DRM_XE_GEM_CREATE_FLAG_SCANOUT (1 << 1)

◆ DRM_XE_GEM_CREATE_SET_PROPERTY_PXP_TYPE

#define DRM_XE_GEM_CREATE_SET_PROPERTY_PXP_TYPE 0

◆ DRM_XE_GEM_MMAP_OFFSET

#define DRM_XE_GEM_MMAP_OFFSET 0x02

◆ DRM_XE_MADVISE

#define DRM_XE_MADVISE 0x0c

◆ DRM_XE_MAX_SYNCS

#define DRM_XE_MAX_SYNCS 1024

◆ DRM_XE_MEM_RANGE_ATTR_ATOMIC

#define DRM_XE_MEM_RANGE_ATTR_ATOMIC 1

◆ DRM_XE_MEM_RANGE_ATTR_PAT

#define DRM_XE_MEM_RANGE_ATTR_PAT 2

◆ DRM_XE_MEM_RANGE_ATTR_PREFERRED_LOC

#define DRM_XE_MEM_RANGE_ATTR_PREFERRED_LOC 0

◆ DRM_XE_MIGRATE_ALL_PAGES

#define DRM_XE_MIGRATE_ALL_PAGES 0

◆ DRM_XE_MIGRATE_ONLY_SYSTEM_PAGES

#define DRM_XE_MIGRATE_ONLY_SYSTEM_PAGES 1

◆ DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER

#define DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER (1 << 0)

◆ DRM_XE_MULTI_GROUP_CREATE

#define DRM_XE_MULTI_GROUP_CREATE (1ull << 63)

◆ DRM_XE_OA_CAPS_BASE

#define DRM_XE_OA_CAPS_BASE (1 << 0)

◆ DRM_XE_OA_CAPS_OA_BUFFER_SIZE

#define DRM_XE_OA_CAPS_OA_BUFFER_SIZE (1 << 2)

◆ DRM_XE_OA_CAPS_OA_UNIT_GT_ID

#define DRM_XE_OA_CAPS_OA_UNIT_GT_ID (1 << 5)

◆ DRM_XE_OA_CAPS_OAM

#define DRM_XE_OA_CAPS_OAM (1 << 4)

◆ DRM_XE_OA_CAPS_SYNCS

#define DRM_XE_OA_CAPS_SYNCS (1 << 1)

◆ DRM_XE_OA_CAPS_WAIT_NUM_REPORTS

#define DRM_XE_OA_CAPS_WAIT_NUM_REPORTS (1 << 3)

◆ DRM_XE_OA_EXTENSION_SET_PROPERTY

#define DRM_XE_OA_EXTENSION_SET_PROPERTY 0

◆ DRM_XE_OA_FORMAT_MASK_BC_REPORT

#define DRM_XE_OA_FORMAT_MASK_BC_REPORT (0xffu << 24)

◆ DRM_XE_OA_FORMAT_MASK_COUNTER_SEL

#define DRM_XE_OA_FORMAT_MASK_COUNTER_SEL (0xffu << 8)

◆ DRM_XE_OA_FORMAT_MASK_COUNTER_SIZE

#define DRM_XE_OA_FORMAT_MASK_COUNTER_SIZE (0xffu << 16)

◆ DRM_XE_OA_FORMAT_MASK_FMT_TYPE

#define DRM_XE_OA_FORMAT_MASK_FMT_TYPE (0xffu << 0)

◆ DRM_XE_OASTATUS_BUFFER_OVERFLOW

#define DRM_XE_OASTATUS_BUFFER_OVERFLOW (1 << 1)

◆ DRM_XE_OASTATUS_COUNTER_OVERFLOW

#define DRM_XE_OASTATUS_COUNTER_OVERFLOW (1 << 2)

◆ DRM_XE_OASTATUS_MMIO_TRG_Q_FULL

#define DRM_XE_OASTATUS_MMIO_TRG_Q_FULL (1 << 3)

◆ DRM_XE_OASTATUS_REPORT_LOST

#define DRM_XE_OASTATUS_REPORT_LOST (1 << 0)

◆ DRM_XE_OBSERVATION

#define DRM_XE_OBSERVATION 0x0b

◆ DRM_XE_PREFERRED_LOC_DEFAULT_DEVICE

#define DRM_XE_PREFERRED_LOC_DEFAULT_DEVICE 0

◆ DRM_XE_PREFERRED_LOC_DEFAULT_SYSTEM

#define DRM_XE_PREFERRED_LOC_DEFAULT_SYSTEM -1

◆ DRM_XE_PXP_HWDRM_DEFAULT_SESSION

#define DRM_XE_PXP_HWDRM_DEFAULT_SESSION 0xf

◆ DRM_XE_QUERY_CONFIG_FLAG_HAS_CPU_ADDR_MIRROR

#define DRM_XE_QUERY_CONFIG_FLAG_HAS_CPU_ADDR_MIRROR (1 << 2)

◆ DRM_XE_QUERY_CONFIG_FLAG_HAS_DISABLE_STATE_CACHE_PERF_FIX

#define DRM_XE_QUERY_CONFIG_FLAG_HAS_DISABLE_STATE_CACHE_PERF_FIX (1 << 4)

◆ DRM_XE_QUERY_CONFIG_FLAG_HAS_LOW_LATENCY

#define DRM_XE_QUERY_CONFIG_FLAG_HAS_LOW_LATENCY (1 << 1)

◆ DRM_XE_QUERY_CONFIG_FLAG_HAS_NO_COMPRESSION_HINT

#define DRM_XE_QUERY_CONFIG_FLAG_HAS_NO_COMPRESSION_HINT (1 << 3)

◆ DRM_XE_QUERY_CONFIG_FLAG_HAS_PURGING_SUPPORT

#define DRM_XE_QUERY_CONFIG_FLAG_HAS_PURGING_SUPPORT (1 << 5)

◆ DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM

#define DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM (1 << 0)

◆ DRM_XE_QUERY_CONFIG_FLAGS

#define DRM_XE_QUERY_CONFIG_FLAGS 1

◆ DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY

#define DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 4

◆ DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT

#define DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT 2

◆ DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID

#define DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0

◆ DRM_XE_QUERY_CONFIG_VA_BITS

#define DRM_XE_QUERY_CONFIG_VA_BITS 3

◆ DRM_XE_QUERY_GT_TYPE_MAIN

#define DRM_XE_QUERY_GT_TYPE_MAIN 0

◆ DRM_XE_QUERY_GT_TYPE_MEDIA

#define DRM_XE_QUERY_GT_TYPE_MEDIA 1

◆ DRM_XE_RAS_ERROR_COMPONENT_NAMES

#define DRM_XE_RAS_ERROR_COMPONENT_NAMES

Value:

    {               \
    [DRM_XE_RAS_ERR_COMP_CORE_COMPUTE] = "core-compute",        \
    [DRM_XE_RAS_ERR_COMP_SOC_INTERNAL] = "soc-internal"     \
}

◆ DRM_XE_RAS_ERROR_SEVERITY_NAMES

#define DRM_XE_RAS_ERROR_SEVERITY_NAMES

Value:

    {               \
    [DRM_XE_RAS_ERR_SEV_CORRECTABLE] = "correctable-errors",    \
    [DRM_XE_RAS_ERR_SEV_UNCORRECTABLE] = "uncorrectable-errors",    \
}

◆ DRM_XE_SYNC_FLAG_SIGNAL

#define DRM_XE_SYNC_FLAG_SIGNAL (1 << 0)

◆ DRM_XE_SYNC_TYPE_SYNCOBJ

#define DRM_XE_SYNC_TYPE_SYNCOBJ 0x0

◆ DRM_XE_SYNC_TYPE_TIMELINE_SYNCOBJ

#define DRM_XE_SYNC_TYPE_TIMELINE_SYNCOBJ 0x1

◆ DRM_XE_SYNC_TYPE_USER_FENCE

#define DRM_XE_SYNC_TYPE_USER_FENCE 0x2

◆ DRM_XE_TOPO_DSS_COMPUTE

#define DRM_XE_TOPO_DSS_COMPUTE 2

◆ DRM_XE_TOPO_DSS_GEOMETRY

#define DRM_XE_TOPO_DSS_GEOMETRY 1

◆ DRM_XE_TOPO_EU_PER_DSS

#define DRM_XE_TOPO_EU_PER_DSS 4

◆ DRM_XE_TOPO_L3_BANK

#define DRM_XE_TOPO_L3_BANK 3

◆ DRM_XE_TOPO_SIMD16_EU_PER_DSS

#define DRM_XE_TOPO_SIMD16_EU_PER_DSS 5

◆ DRM_XE_UFENCE_WAIT_FLAG_ABSTIME

#define DRM_XE_UFENCE_WAIT_FLAG_ABSTIME (1 << 0)

◆ DRM_XE_UFENCE_WAIT_OP_EQ

#define DRM_XE_UFENCE_WAIT_OP_EQ 0x0

◆ DRM_XE_UFENCE_WAIT_OP_GT

#define DRM_XE_UFENCE_WAIT_OP_GT 0x2

◆ DRM_XE_UFENCE_WAIT_OP_GTE

#define DRM_XE_UFENCE_WAIT_OP_GTE 0x3

◆ DRM_XE_UFENCE_WAIT_OP_LT

#define DRM_XE_UFENCE_WAIT_OP_LT 0x4

◆ DRM_XE_UFENCE_WAIT_OP_LTE

#define DRM_XE_UFENCE_WAIT_OP_LTE 0x5

◆ DRM_XE_UFENCE_WAIT_OP_NEQ

#define DRM_XE_UFENCE_WAIT_OP_NEQ 0x1

◆ DRM_XE_VM_BIND

#define DRM_XE_VM_BIND 0x05

◆ DRM_XE_VM_BIND_FLAG_CHECK_PXP

#define DRM_XE_VM_BIND_FLAG_CHECK_PXP (1 << 4)

◆ DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR

#define DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR (1 << 5)

◆ DRM_XE_VM_BIND_FLAG_DECOMPRESS

#define DRM_XE_VM_BIND_FLAG_DECOMPRESS (1 << 7)

◆ DRM_XE_VM_BIND_FLAG_DUMPABLE

#define DRM_XE_VM_BIND_FLAG_DUMPABLE (1 << 3)

◆ DRM_XE_VM_BIND_FLAG_IMMEDIATE

#define DRM_XE_VM_BIND_FLAG_IMMEDIATE (1 << 1)

◆ DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET

#define DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET (1 << 6)

◆ DRM_XE_VM_BIND_FLAG_NULL

#define DRM_XE_VM_BIND_FLAG_NULL (1 << 2)

◆ DRM_XE_VM_BIND_FLAG_READONLY

#define DRM_XE_VM_BIND_FLAG_READONLY (1 << 0)

◆ DRM_XE_VM_BIND_OP_MAP

#define DRM_XE_VM_BIND_OP_MAP 0x0

◆ DRM_XE_VM_BIND_OP_MAP_USERPTR

#define DRM_XE_VM_BIND_OP_MAP_USERPTR 0x2

◆ DRM_XE_VM_BIND_OP_PREFETCH

#define DRM_XE_VM_BIND_OP_PREFETCH 0x4

◆ DRM_XE_VM_BIND_OP_UNMAP

#define DRM_XE_VM_BIND_OP_UNMAP 0x1

◆ DRM_XE_VM_BIND_OP_UNMAP_ALL

#define DRM_XE_VM_BIND_OP_UNMAP_ALL 0x3

◆ DRM_XE_VM_CREATE

#define DRM_XE_VM_CREATE 0x03

◆ DRM_XE_VM_CREATE_FLAG_FAULT_MODE

#define DRM_XE_VM_CREATE_FLAG_FAULT_MODE (1 << 2)

◆ DRM_XE_VM_CREATE_FLAG_LR_MODE

#define DRM_XE_VM_CREATE_FLAG_LR_MODE (1 << 1)

◆ DRM_XE_VM_CREATE_FLAG_NO_VM_OVERCOMMIT

#define DRM_XE_VM_CREATE_FLAG_NO_VM_OVERCOMMIT (1 << 3)

◆ DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE

#define DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE (1 << 0)

◆ DRM_XE_VM_DESTROY

#define DRM_XE_VM_DESTROY 0x04

◆ DRM_XE_VM_GET_PROPERTY

#define DRM_XE_VM_GET_PROPERTY 0x0f

◆ DRM_XE_VM_GET_PROPERTY_FAULTS

#define DRM_XE_VM_GET_PROPERTY_FAULTS 0

◆ DRM_XE_VM_QUERY_MEM_RANGE_ATTRS

#define DRM_XE_VM_QUERY_MEM_RANGE_ATTRS 0x0d

◆ DRM_XE_VMA_ATTR_PURGEABLE_STATE

#define DRM_XE_VMA_ATTR_PURGEABLE_STATE 3

◆ DRM_XE_VMA_PURGEABLE_STATE_DONTNEED

#define DRM_XE_VMA_PURGEABLE_STATE_DONTNEED 1

◆ DRM_XE_VMA_PURGEABLE_STATE_WILLNEED

#define DRM_XE_VMA_PURGEABLE_STATE_WILLNEED 0

◆ DRM_XE_WAIT_USER_FENCE

#define DRM_XE_WAIT_USER_FENCE 0x0a

◆ FAULT_ACCESS_TYPE_ATOMIC

#define FAULT_ACCESS_TYPE_ATOMIC 2

◆ FAULT_ACCESS_TYPE_READ

#define FAULT_ACCESS_TYPE_READ 0

@access_type: Type of address access that resulted in fault

◆ FAULT_ACCESS_TYPE_WRITE

#define FAULT_ACCESS_TYPE_WRITE 1

◆ FAULT_LEVEL_PDE

#define FAULT_LEVEL_PDE 1

◆ FAULT_LEVEL_PDP

#define FAULT_LEVEL_PDP 2

◆ FAULT_LEVEL_PML4

#define FAULT_LEVEL_PML4 3

◆ FAULT_LEVEL_PML5

#define FAULT_LEVEL_PML5 4

◆ FAULT_LEVEL_PTE

#define FAULT_LEVEL_PTE 0

@fault_level: fault level of the fault

◆ FAULT_TYPE_ATOMIC_ACCESS

#define FAULT_TYPE_ATOMIC_ACCESS 2

◆ FAULT_TYPE_NOT_PRESENT

#define FAULT_TYPE_NOT_PRESENT 0

@fault_type: Type of fault reported

◆ FAULT_TYPE_WRITE_ACCESS

#define FAULT_TYPE_WRITE_ACCESS 1

◆ XE_QUERY_UC_TYPE_GUC_SUBMISSION

#define XE_QUERY_UC_TYPE_GUC_SUBMISSION 0

@uc_type: The micro-controller type to query firmware version

◆ XE_QUERY_UC_TYPE_HUC

#define XE_QUERY_UC_TYPE_HUC 1

Enumeration Type Documentation

◆ drm_xe_eu_stall_property_id

enum drm_xe_eu_stall_property_id

enum drm_xe_eu_stall_property_id - EU stall sampling input property ids.

These properties are passed to the driver at open as a chain of &struct drm_xe_ext_set_property structures with property set to these properties' enums and value set to the corresponding values of these properties. &struct drm_xe_user_extension base.name should be set to DRM_XE_EU_STALL_EXTENSION_SET_PROPERTY.

With the file descriptor obtained from open, user space must enable the EU stall stream fd with DRM_XE_OBSERVATION_IOCTL_ENABLE before calling read(). EIO errno from read() indicates HW dropped data due to full buffer.

Enumerator
DRM_XE_EU_STALL_PROP_GT_ID	@DRM_XE_EU_STALL_PROP_GT_ID: gt_id of the GT on which EU stall data will be captured.
DRM_XE_EU_STALL_PROP_SAMPLE_RATE	@DRM_XE_EU_STALL_PROP_SAMPLE_RATE: Sampling rate in GPU cycles from sampling_rates in &struct drm_xe_query_eu_stall
DRM_XE_EU_STALL_PROP_WAIT_NUM_REPORTS	@DRM_XE_EU_STALL_PROP_WAIT_NUM_REPORTS: Minimum number of EU stall data reports to be present in the kernel buffer before unblocking a blocked poll or read.

◆ drm_xe_memory_class

enum drm_xe_memory_class

enum drm_xe_memory_class - Supported memory classes.

Enumerator
DRM_XE_MEM_REGION_CLASS_SYSMEM	@DRM_XE_MEM_REGION_CLASS_SYSMEM: Represents system memory.
DRM_XE_MEM_REGION_CLASS_VRAM	@DRM_XE_MEM_REGION_CLASS_VRAM: On discrete platforms, this represents the memory that is local to the device, which we call VRAM. Not valid on integrated platforms.

◆ drm_xe_oa_format_type

enum drm_xe_oa_format_type

enum drm_xe_oa_format_type - OA format types as specified in PRM/Bspec 52198/60942

Enumerator
DRM_XE_OA_FMT_TYPE_OAG	@DRM_XE_OA_FMT_TYPE_OAG: OAG report format
DRM_XE_OA_FMT_TYPE_OAR	@DRM_XE_OA_FMT_TYPE_OAR: OAR report format
DRM_XE_OA_FMT_TYPE_OAM	@DRM_XE_OA_FMT_TYPE_OAM: OAM report format
DRM_XE_OA_FMT_TYPE_OAC	@DRM_XE_OA_FMT_TYPE_OAC: OAC report format
DRM_XE_OA_FMT_TYPE_OAM_MPEC	@DRM_XE_OA_FMT_TYPE_OAM_MPEC: OAM SAMEDIA or OAM MPEC report format
DRM_XE_OA_FMT_TYPE_PEC	@DRM_XE_OA_FMT_TYPE_PEC: PEC report format

◆ drm_xe_oa_property_id

enum drm_xe_oa_property_id

enum drm_xe_oa_property_id - OA stream property IDs

Stream params are specified as a chain of &struct drm_xe_ext_set_property structs, with property values from &enum drm_xe_oa_property_id and &struct drm_xe_user_extension base.name set to DRM_XE_OA_EXTENSION_SET_PROPERTY. The param field in &struct drm_xe_observation_param points to the first &struct drm_xe_ext_set_property struct.

Exactly the same mechanism is also used for stream reconfiguration using the DRM_XE_OBSERVATION_IOCTL_CONFIG observation stream fd ioctl, though only a subset of properties below can be specified for stream reconfiguration.

Enumerator
DRM_XE_OA_PROPERTY_OA_UNIT_ID	@DRM_XE_OA_PROPERTY_OA_UNIT_ID: ID of the OA unit on which to open the OA stream, see oa_unit_id in &struct drm_xe_oa_unit. Defaults to 0 if not provided.
DRM_XE_OA_PROPERTY_SAMPLE_OA	@DRM_XE_OA_PROPERTY_SAMPLE_OA: A value of 1 requests inclusion of raw OA unit reports or stream samples in a global buffer attached to an OA unit.
DRM_XE_OA_PROPERTY_OA_METRIC_SET	@DRM_XE_OA_PROPERTY_OA_METRIC_SET: OA metrics defining contents of OA reports, previously added via DRM_XE_OBSERVATION_OP_ADD_CONFIG.
DRM_XE_OA_PROPERTY_OA_FORMAT	@DRM_XE_OA_PROPERTY_OA_FORMAT: OA counter report format
DRM_XE_OA_PROPERTY_OA_PERIOD_EXPONENT	@DRM_XE_OA_PROPERTY_OA_PERIOD_EXPONENT: Requests periodic OA unit sampling with sampling frequency proportional to 2^(period_exponent + 1)
DRM_XE_OA_PROPERTY_OA_DISABLED	@DRM_XE_OA_PROPERTY_OA_DISABLED: A value of 1 will open the OA stream in a DISABLED state (see DRM_XE_OBSERVATION_IOCTL_ENABLE).
DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID	@DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID: Open the stream for a specific exec_queue_id. OA queries can be executed on this exec queue.
DRM_XE_OA_PROPERTY_OA_ENGINE_INSTANCE	@DRM_XE_OA_PROPERTY_OA_ENGINE_INSTANCE: Optional engine instance to pass along with DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID or will default to 0.
DRM_XE_OA_PROPERTY_NO_PREEMPT	@DRM_XE_OA_PROPERTY_NO_PREEMPT: Allow preemption and timeslicing to be disabled for the stream exec queue.
DRM_XE_OA_PROPERTY_NUM_SYNCS	@DRM_XE_OA_PROPERTY_NUM_SYNCS: Number of syncs in the sync array specified in DRM_XE_OA_PROPERTY_SYNCS
DRM_XE_OA_PROPERTY_SYNCS	@DRM_XE_OA_PROPERTY_SYNCS: Pointer to &struct drm_xe_sync array with array size specified via DRM_XE_OA_PROPERTY_NUM_SYNCS. OA configuration will wait till input fences signal. Output fences will signal after the new OA configuration takes effect. For DRM_XE_SYNC_TYPE_USER_FENCE, addr is a user pointer, similar to the VM bind case.
DRM_XE_OA_PROPERTY_OA_BUFFER_SIZE	@DRM_XE_OA_PROPERTY_OA_BUFFER_SIZE: Size of OA buffer to be allocated by the driver in bytes. Supported sizes are powers of 2 from 128 KiB to 128 MiB. When not specified, a 16 MiB OA buffer is allocated by default.
DRM_XE_OA_PROPERTY_WAIT_NUM_REPORTS	@DRM_XE_OA_PROPERTY_WAIT_NUM_REPORTS: Number of reports to wait for before unblocking poll or read

◆ drm_xe_oa_unit_type

enum drm_xe_oa_unit_type

enum drm_xe_oa_unit_type - OA unit types

Enumerator
DRM_XE_OA_UNIT_TYPE_OAG	@DRM_XE_OA_UNIT_TYPE_OAG: OAG OA unit. OAR/OAC are considered sub-types of OAG. For OAR/OAC, use OAG.
DRM_XE_OA_UNIT_TYPE_OAM	@DRM_XE_OA_UNIT_TYPE_OAM: OAM OA unit
DRM_XE_OA_UNIT_TYPE_OAM_SAG	@DRM_XE_OA_UNIT_TYPE_OAM_SAG: OAM_SAG OA unit
DRM_XE_OA_UNIT_TYPE_MERT	@DRM_XE_OA_UNIT_TYPE_MERT: MERT OA unit

◆ drm_xe_observation_ioctls

enum drm_xe_observation_ioctls

enum drm_xe_observation_ioctls - Observation stream fd ioctls

Information exchanged between userspace and kernel for observation fd ioctls is stream type specific

Enumerator
DRM_XE_OBSERVATION_IOCTL_ENABLE	@DRM_XE_OBSERVATION_IOCTL_ENABLE: Enable data capture for an observation stream
DRM_XE_OBSERVATION_IOCTL_DISABLE	@DRM_XE_OBSERVATION_IOCTL_DISABLE: Disable data capture for an observation stream
DRM_XE_OBSERVATION_IOCTL_CONFIG	@DRM_XE_OBSERVATION_IOCTL_CONFIG: Change observation stream configuration
DRM_XE_OBSERVATION_IOCTL_STATUS	@DRM_XE_OBSERVATION_IOCTL_STATUS: Return observation stream status
DRM_XE_OBSERVATION_IOCTL_INFO	@DRM_XE_OBSERVATION_IOCTL_INFO: Return observation stream info

◆ drm_xe_observation_op

enum drm_xe_observation_op

enum drm_xe_observation_op - Observation stream ops

Enumerator
DRM_XE_OBSERVATION_OP_STREAM_OPEN	@DRM_XE_OBSERVATION_OP_STREAM_OPEN: Open an observation stream
DRM_XE_OBSERVATION_OP_ADD_CONFIG	@DRM_XE_OBSERVATION_OP_ADD_CONFIG: Add observation stream config
DRM_XE_OBSERVATION_OP_REMOVE_CONFIG	@DRM_XE_OBSERVATION_OP_REMOVE_CONFIG: Remove observation stream config

◆ drm_xe_observation_type

enum drm_xe_observation_type

enum drm_xe_observation_type - Observation stream types

Enumerator
DRM_XE_OBSERVATION_TYPE_OA	@DRM_XE_OBSERVATION_TYPE_OA: OA observation stream type
DRM_XE_OBSERVATION_TYPE_EU_STALL	@DRM_XE_OBSERVATION_TYPE_EU_STALL: EU stall sampling observation stream type

◆ drm_xe_pxp_session_type

enum drm_xe_pxp_session_type

enum drm_xe_pxp_session_type - Supported PXP session types.

We currently only support HWDRM sessions, which are used for protected content that ends up being displayed, but the HW supports multiple types, so we might extend support in the future.

Enumerator
DRM_XE_PXP_TYPE_NONE	@DRM_XE_PXP_TYPE_NONE: PXP not used
DRM_XE_PXP_TYPE_HWDRM	@DRM_XE_PXP_TYPE_HWDRM: HWDRM sessions are used for content that ends up on the display.

◆ drm_xe_ras_error_component

enum drm_xe_ras_error_component

enum drm_xe_ras_error_component - DRM RAS error component.

Enumerator
DRM_XE_RAS_ERR_COMP_CORE_COMPUTE	@DRM_XE_RAS_ERR_COMP_CORE_COMPUTE: Core Compute Error
DRM_XE_RAS_ERR_COMP_SOC_INTERNAL	@DRM_XE_RAS_ERR_COMP_SOC_INTERNAL: SoC Internal Error
DRM_XE_RAS_ERR_COMP_MAX	@DRM_XE_RAS_ERR_COMP_MAX: Max Error

◆ drm_xe_ras_error_severity

enum drm_xe_ras_error_severity

DOC: Xe DRM RAS

The enums and strings defined below map to the attributes of the DRM RAS Netlink Interface. Refer to Documentation/netlink/specs/drm_ras.yaml for complete interface specification.

Node Registration

The driver registers DRM RAS nodes for each error severity level. enum drm_xe_ras_error_severity defines the node-id, while DRM_XE_RAS_ERROR_SEVERITY_NAMES maps node-id to node-name.

Error Classification

Each node contains a list of error counters. Each error is identified by a error-id and an error-name. enum drm_xe_ras_error_component defines the error-id, while DRM_XE_RAS_ERROR_COMPONENT_NAMES maps error-id to error-name.

User Interface

To retrieve error values of a error counter, userspace applications should follow the below steps:

Use command LIST_NODES to enumerate all available nodes
Select node by node-id or node-name
Use command GET_ERROR_COUNTERS to list errors of specific node
Query specific error values using either error-id or error-name

.. code-block:: C

// Lookup tables for ID-to-name resolution static const char *nodes[] = DRM_XE_RAS_ERROR_SEVERITY_NAMES; static const char *errors[] = DRM_XE_RAS_ERROR_COMPONENT_NAMES; enum drm_xe_ras_error_severity - DRM RAS error severity.

Enumerator
DRM_XE_RAS_ERR_SEV_CORRECTABLE	@DRM_XE_RAS_ERR_SEV_CORRECTABLE: Correctable Error
DRM_XE_RAS_ERR_SEV_UNCORRECTABLE	@DRM_XE_RAS_ERR_SEV_UNCORRECTABLE: Uncorrectable Error
DRM_XE_RAS_ERR_SEV_MAX	@DRM_XE_RAS_ERR_SEV_MAX: Max severity

Classes

Macros

Enumerations