serial_core.h

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/*
 * DCL <linux/linux/serial_core.h> -- assembled from mainline v7.2.
 *
 * include/linux/serial_core.h
 * include/uapi/linux/serial_core.h
 *
 * Provenance, verbatim upstream:
 *   (unresolved)
 *
 * How this file was produced (python3 /tmp/mkbasehdr.py):
 *   - upstream text is copied as-is; these are layout-critical declarations
 *     and a hand-typed `struct uart_port` that disagrees with the vendor
 *     sources by one field would compile cleanly and then read the wrong
 *     offset at runtime, which is exactly the class of bug this whole
 *     exercise exists to avoid
 *   - <uapi/linux/X> content is inlined in place of its include: DCL has no
 *     uapi tree, BaseHdr is flat, and no vendored .c names a uapi path
 *   - the driver-local headers (8250.h, serial_base.h,
 *     serial_mctrl_gpio.h) are NOT here -- they are private to their driver
 *     and live in Vendored/ beside the .c that includes them, resolved by
 *     quoted-include rules
 *
 * Everything below this comment is mainline's. DCL-specific deviations are
 * made where the errors demand them, not speculatively.
 */
 
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 *  linux/drivers/char/serial_core.h
 *
 *  Copyright (C) 2000 Deep Blue Solutions Ltd.
 */
#ifndef LINUX_SERIAL_CORE_H
#define LINUX_SERIAL_CORE_H
 
#include <linux/bitops.h>
#include <linux/compiler.h>
#include <linux/console.h>
#include <linux/interrupt.h>
#include <linux/lockdep.h>
#include <linux/printk.h>
#include <linux/spinlock.h>
#include <linux/sched.h>
#include <linux/tty.h>
#include <linux/mutex.h>
#include <linux/sysrq.h>
/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
/*
 *  Copyright (C) 2000 Deep Blue Solutions Ltd.
 */
#ifndef _UAPILINUX_SERIAL_CORE_H
#define _UAPILINUX_SERIAL_CORE_H
 
#include <linux/serial.h>
 
/*
 * The type definitions.  These are from Ted Ts'o's serial.h
 * By historical reasons the values from 0 to 13 are defined
 * in the include/uapi/linux/serial.h, do not define them here.
 * Values 0 to 19 are used by setserial from busybox and must never
 * be modified.
 */
#define PORT_NS16550A   14
#define PORT_XSCALE 15
#define PORT_RM9000 16  /* PMC-Sierra RM9xxx internal UART */
#define PORT_OCTEON 17  /* Cavium OCTEON internal UART */
#define PORT_AR7    18  /* Texas Instruments AR7 internal UART */
#define PORT_U6_16550A  19  /* ST-Ericsson U6xxx internal UART */
#define PORT_TEGRA  20  /* NVIDIA Tegra internal UART */
#define PORT_XR17D15X   21  /* Exar XR17D15x UART */
#define PORT_LPC3220    22  /* NXP LPC32xx SoC "Standard" UART */
#define PORT_8250_CIR   23  /* CIR infrared port, has its own driver */
#define PORT_XR17V35X   24  /* Exar XR17V35x UARTs */
#define PORT_BRCM_TRUMANAGE 25
#define PORT_ALTR_16550_F32 26  /* Altera 16550 UART with 32 FIFOs */
#define PORT_ALTR_16550_F64 27  /* Altera 16550 UART with 64 FIFOs */
#define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */
#define PORT_RT2880 29  /* Ralink RT2880 internal UART */
#define PORT_16550A_FSL64 30    /* Freescale 16550 UART with 64 FIFOs */
 
/*
 * ARM specific type numbers.  These are not currently guaranteed
 * to be implemented, and will change in the future.  These are
 * separate so any additions to the old serial.c that occur before
 * we are merged can be easily merged here.
 */
#define PORT_PXA    31
#define PORT_AMBA   32
#define PORT_CLPS711X   33
#define PORT_SA1100 34
#define PORT_UART00 35
#define PORT_OWL    36
#define PORT_21285  37
 
/* Sparc type numbers.  */
#define PORT_SUNZILOG   38
#define PORT_SUNSAB 39
 
/* Nuvoton UART */
#define PORT_NPCM   40
 
/* NVIDIA Tegra Combined UART */
#define PORT_TEGRA_TCU  41
 
/* ASPEED AST2x00 virtual UART */
#define PORT_ASPEED_VUART   42
 
/* Intel EG20 */
#define PORT_PCH_8LINE  44
#define PORT_PCH_2LINE  45
 
/* DEC */
#define PORT_DZ     46
#define PORT_ZS     47
 
/* Parisc type numbers. */
#define PORT_MUX    48
 
/* Atmel AT91 SoC */
#define PORT_ATMEL  49
 
/* Macintosh Zilog type numbers */
#define PORT_MAC_ZILOG  50  /* m68k : not yet implemented */
#define PORT_PMAC_ZILOG 51
 
/* SH-SCI */
#define PORT_SCI    52
#define PORT_SCIF   53
#define PORT_IRDA   54
 
/* SGI IP22 aka Indy / Challenge S / Indigo 2 */
#define PORT_IP22ZILOG  56
 
/* PPC CPM type number */
#define PORT_CPM        58
 
/* MPC52xx (and MPC512x) type numbers */
#define PORT_MPC52xx    59
 
/* IBM icom */
#define PORT_ICOM   60
 
/* Motorola i.MX SoC */
#define PORT_IMX    62
 
/* TXX9 type number */
#define PORT_TXX9   64
 
/*Digi jsm */
#define PORT_JSM        69
 
/* SUN4V Hypervisor Console */
#define PORT_SUNHV  72
 
/* Xilinx uartlite */
#define PORT_UARTLITE   74
 
/* Broadcom BCM7271 UART */
#define PORT_BCM7271    76
 
/* Broadcom SB1250, etc. SOC */
#define PORT_SB1250_DUART   77
 
/* Freescale ColdFire */
#define PORT_MCF    78
 
#define PORT_SC26XX 82
 
/* SH-SCI */
#define PORT_SCIFA  83
 
#define PORT_S3C6400    84
 
/* MAX3100 */
#define PORT_MAX3100    86
 
/* Timberdale UART */
#define PORT_TIMBUART   87
 
/* Qualcomm MSM SoCs */
#define PORT_MSM    88
 
/* BCM63xx family SoCs */
#define PORT_BCM63XX    89
 
/* Aeroflex Gaisler GRLIB APBUART */
#define PORT_APBUART    90
 
/* Altera UARTs */
#define PORT_ALTERA_JTAGUART    91
#define PORT_ALTERA_UART    92
 
/* SH-SCI */
#define PORT_SCIFB  93
 
/* MAX310X */
#define PORT_MAX310X    94
 
/* TI DA8xx/66AK2x */
#define PORT_DA830  95
 
/* TI OMAP-UART */
#define PORT_OMAP   96
 
/* VIA VT8500 SoC */
#define PORT_VT8500 97
 
/* Cadence (Xilinx Zynq) UART */
#define PORT_XUARTPS    98
 
/* Atheros AR933X SoC */
#define PORT_AR933X 99
 
/* MCHP 16550A UART with 256 byte FIFOs */
#define PORT_MCHP16550A 100
 
/* ARC (Synopsys) on-chip UART */
#define PORT_ARC       101
 
/* Rocketport EXPRESS/INFINITY */
#define PORT_RP2    102
 
/* Freescale lpuart */
#define PORT_LPUART 103
 
/* SH-SCI */
#define PORT_HSCIF  104
 
/* ST ASC type numbers */
#define PORT_ASC       105
 
/* MEN 16z135 UART */
#define PORT_MEN_Z135   107
 
/* SC16IS7xx */
#define PORT_SC16IS7XX   108
 
/* MESON */
#define PORT_MESON  109
 
/* Conexant Digicolor */
#define PORT_DIGICOLOR  110
 
/* SPRD SERIAL  */
#define PORT_SPRD   111
 
/* STM32 USART */
#define PORT_STM32  113
 
/* MVEBU UART */
#define PORT_MVEBU  114
 
/* Microchip PIC32 UART */
#define PORT_PIC32  115
 
/* MPS2 UART */
#define PORT_MPS2UART   116
 
/* MediaTek BTIF */
#define PORT_MTK_BTIF   117
 
/* RDA UART */
#define PORT_RDA    118
 
/* Socionext Milbeaut UART */
#define PORT_MLB_USIO   119
 
/* SiFive UART */
#define PORT_SIFIVE_V0  120
 
/* Sunix UART */
#define PORT_SUNIX  121
 
/* Freescale LINFlexD UART */
#define PORT_LINFLEXUART    122
 
/* Sunplus UART */
#define PORT_SUNPLUS    123
 
/* Generic type identifier for ports which type is not important to userspace. */
#define PORT_GENERIC    (-1)
 
#endif /* _UAPILINUX_SERIAL_CORE_H */
 
 
#ifdef CONFIG_SERIAL_CORE_CONSOLE
#define uart_console(port) \
    ((port)->cons && (port)->cons->index == (port)->line)
#else
#define uart_console(port)      ({ (void)port; 0; })
#endif
 
struct uart_port;
struct serial_struct;
struct serial_port_device;
struct device;
struct gpio_desc;
 
struct uart_ops {
    unsigned int    (*tx_empty)(struct uart_port *);
    void        (*set_mctrl)(struct uart_port *, unsigned int mctrl);
    unsigned int    (*get_mctrl)(struct uart_port *);
    void        (*stop_tx)(struct uart_port *);
    void        (*start_tx)(struct uart_port *);
    void        (*throttle)(struct uart_port *);
    void        (*unthrottle)(struct uart_port *);
    void        (*send_xchar)(struct uart_port *, char ch);
    void        (*stop_rx)(struct uart_port *);
    void        (*start_rx)(struct uart_port *);
    void        (*enable_ms)(struct uart_port *);
    void        (*break_ctl)(struct uart_port *, int ctl);
    int     (*startup)(struct uart_port *);
    void        (*shutdown)(struct uart_port *);
    void        (*flush_buffer)(struct uart_port *);
    void        (*set_termios)(struct uart_port *, struct ktermios *new,
                       const struct ktermios *old);
    void        (*set_ldisc)(struct uart_port *, struct ktermios *);
    void        (*pm)(struct uart_port *, unsigned int state,
                  unsigned int oldstate);
    const char  *(*type)(struct uart_port *);
    void        (*release_port)(struct uart_port *);
    int     (*request_port)(struct uart_port *);
    void        (*config_port)(struct uart_port *, int);
    int     (*verify_port)(struct uart_port *, struct serial_struct *);
    int     (*ioctl)(struct uart_port *, unsigned int, unsigned long);
#ifdef CONFIG_CONSOLE_POLL
    int     (*poll_init)(struct uart_port *);
    void        (*poll_put_char)(struct uart_port *, unsigned char);
    int     (*poll_get_char)(struct uart_port *);
#endif
};
 
#define NO_POLL_CHAR        0x00ff0000
#define UART_CONFIG_TYPE    (1 << 0)
#define UART_CONFIG_IRQ     (1 << 1)
 
struct uart_icount {
    __u32   cts;
    __u32   dsr;
    __u32   rng;
    __u32   dcd;
    __u32   rx;
    __u32   tx;
    __u32   frame;
    __u32   overrun;
    __u32   parity;
    __u32   brk;
    __u32   buf_overrun;
};
 
typedef u64 __bitwise upf_t;
typedef unsigned int __bitwise upstat_t;
 
enum uart_iotype {
    UPIO_UNKNOWN    = -1,
    UPIO_PORT   = SERIAL_IO_PORT,   /* 8b I/O port access */
    UPIO_HUB6   = SERIAL_IO_HUB6,   /* Hub6 ISA card */
    UPIO_MEM    = SERIAL_IO_MEM,    /* driver-specific */
    UPIO_MEM32  = SERIAL_IO_MEM32,  /* 32b little endian */
    UPIO_AU     = SERIAL_IO_AU,     /* Au1x00 and RT288x type IO */
    UPIO_TSI    = SERIAL_IO_TSI,    /* Tsi108/109 type IO */
    UPIO_MEM32BE    = SERIAL_IO_MEM32BE,    /* 32b big endian */
    UPIO_MEM16  = SERIAL_IO_MEM16,  /* 16b little endian */
};
 
struct uart_port {
    spinlock_t      lock;           /* port lock */
    unsigned long       iobase;         /* in/out[bwl] */
    unsigned char __iomem   *membase;       /* read/write[bwl] */
    u32         (*serial_in)(struct uart_port *, unsigned int offset);
    void            (*serial_out)(struct uart_port *, unsigned int offset, u32 val);
    void            (*set_termios)(struct uart_port *,
                               struct ktermios *new,
                               const struct ktermios *old);
    void            (*set_ldisc)(struct uart_port *,
                         struct ktermios *);
    unsigned int        (*get_mctrl)(struct uart_port *);
    void            (*set_mctrl)(struct uart_port *, unsigned int);
    unsigned int        (*get_divisor)(struct uart_port *,
                           unsigned int baud,
                           unsigned int *frac);
    void            (*set_divisor)(struct uart_port *,
                           unsigned int baud,
                           unsigned int quot,
                           unsigned int quot_frac);
    int         (*startup)(struct uart_port *port);
    void            (*shutdown)(struct uart_port *port);
    void            (*throttle)(struct uart_port *port);
    void            (*unthrottle)(struct uart_port *port);
    int         (*handle_irq)(struct uart_port *);
    void            (*pm)(struct uart_port *, unsigned int state,
                      unsigned int old);
    void            (*handle_break)(struct uart_port *);
    int         (*rs485_config)(struct uart_port *,
                        struct ktermios *termios,
                        struct serial_rs485 *rs485);
    int         (*iso7816_config)(struct uart_port *,
                          struct serial_iso7816 *iso7816);
    unsigned int        ctrl_id;        /* optional serial core controller id */
    unsigned int        port_id;        /* optional serial core port id */
    unsigned int        irq;            /* irq number */
    unsigned long       irqflags;       /* irq flags  */
    unsigned int        uartclk;        /* base uart clock */
    unsigned int        fifosize;       /* tx fifo size */
    unsigned char       x_char;         /* xon/xoff char */
    unsigned char       regshift;       /* reg offset shift */
 
    unsigned char       quirks;         /* internal quirks */
 
    /* internal quirks must be updated while holding port mutex */
#define UPQ_NO_TXEN_TEST    BIT(0)
 
    enum uart_iotype    iotype;         /* io access style */
 
    unsigned int        read_status_mask;   /* driver specific */
    unsigned int        ignore_status_mask; /* driver specific */
    struct uart_state   *state;         /* pointer to parent state */
    struct uart_icount  icount;         /* statistics */
 
    struct console      *cons;          /* struct console, if any */
    /* flags must be updated while holding port mutex */
    upf_t           flags;
 
    /*
     * These flags must be equivalent to the flags defined in
     * include/uapi/linux/tty_flags.h which are the userspace definitions
     * assigned from the serial_struct flags in uart_set_info()
     * [for bit definitions in the UPF_CHANGE_MASK]
     *
     * Bits [0..ASYNCB_LAST_USER] are userspace defined/visible/changeable
     * The remaining bits are serial-core specific and not modifiable by
     * userspace.
     */
#ifdef CONFIG_HAS_IOPORT
#define UPF_FOURPORT        ((__force upf_t) ASYNC_FOURPORT       /* 1  */ )
#else
#define UPF_FOURPORT        0
#endif
#define UPF_SAK         ((__force upf_t) ASYNC_SAK            /* 2  */ )
#define UPF_SPD_HI      ((__force upf_t) ASYNC_SPD_HI         /* 4  */ )
#define UPF_SPD_VHI     ((__force upf_t) ASYNC_SPD_VHI        /* 5  */ )
#define UPF_SPD_CUST        ((__force upf_t) ASYNC_SPD_CUST   /* 0x0030 */ )
#define UPF_SPD_WARP        ((__force upf_t) ASYNC_SPD_WARP   /* 0x1010 */ )
#define UPF_SPD_MASK        ((__force upf_t) ASYNC_SPD_MASK   /* 0x1030 */ )
#define UPF_SKIP_TEST       ((__force upf_t) ASYNC_SKIP_TEST      /* 6  */ )
#define UPF_AUTO_IRQ        ((__force upf_t) ASYNC_AUTO_IRQ       /* 7  */ )
#define UPF_HARDPPS_CD      ((__force upf_t) ASYNC_HARDPPS_CD     /* 11 */ )
#define UPF_SPD_SHI     ((__force upf_t) ASYNC_SPD_SHI        /* 12 */ )
#define UPF_LOW_LATENCY     ((__force upf_t) ASYNC_LOW_LATENCY    /* 13 */ )
#define UPF_BUGGY_UART      ((__force upf_t) ASYNC_BUGGY_UART     /* 14 */ )
#define UPF_MAGIC_MULTIPLIER    ((__force upf_t) ASYNC_MAGIC_MULTIPLIER /* 16 */ )
 
#define UPF_NO_THRE_TEST    ((__force upf_t) BIT_ULL(19))
/* Port has hardware-assisted h/w flow control */
#define UPF_AUTO_CTS        ((__force upf_t) BIT_ULL(20))
#define UPF_AUTO_RTS        ((__force upf_t) BIT_ULL(21))
#define UPF_HARD_FLOW       ((__force upf_t) (UPF_AUTO_CTS | UPF_AUTO_RTS))
/* Port has hardware-assisted s/w flow control */
#define UPF_SOFT_FLOW       ((__force upf_t) BIT_ULL(22))
/* Deprecated: use uart_set_cons_flow_enabled()/uart_cons_flow_enabled() instead. */
#define UPF_CONS_FLOW       ((__force upf_t) BIT_ULL(23))
#define UPF_SHARE_IRQ       ((__force upf_t) BIT_ULL(24))
#define UPF_EXAR_EFR        ((__force upf_t) BIT_ULL(25))
#define UPF_BUG_THRE        ((__force upf_t) BIT_ULL(26))
/* The exact UART type is known and should not be probed.  */
#define UPF_FIXED_TYPE      ((__force upf_t) BIT_ULL(27))
#define UPF_BOOT_AUTOCONF   ((__force upf_t) BIT_ULL(28))
#define UPF_FIXED_PORT      ((__force upf_t) BIT_ULL(29))
#define UPF_DEAD        ((__force upf_t) BIT_ULL(30))
#define UPF_IOREMAP     ((__force upf_t) BIT_ULL(31))
#define UPF_FULL_PROBE      ((__force upf_t) BIT_ULL(32))
 
#define __UPF_CHANGE_MASK   0x17fff
#define UPF_CHANGE_MASK     ((__force upf_t) __UPF_CHANGE_MASK)
#define UPF_USR_MASK        ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
 
#if __UPF_CHANGE_MASK > ASYNC_FLAGS
#error Change mask not equivalent to userspace-visible bit defines
#endif
 
    /*
     * Must hold termios_rwsem, port mutex and port lock to change;
     * can hold any one lock to read.
     */
    upstat_t        status;
 
#define UPSTAT_CTS_ENABLE   ((__force upstat_t) (1 << 0))
#define UPSTAT_DCD_ENABLE   ((__force upstat_t) (1 << 1))
#define UPSTAT_AUTORTS      ((__force upstat_t) (1 << 2))
#define UPSTAT_AUTOCTS      ((__force upstat_t) (1 << 3))
#define UPSTAT_AUTOXOFF     ((__force upstat_t) (1 << 4))
#define UPSTAT_SYNC_FIFO    ((__force upstat_t) (1 << 5))
 
    bool            hw_stopped;     /* sw-assisted CTS flow state */
    bool            cons_flow;      /* user specified console flow control */
    unsigned int        mctrl;          /* current modem ctrl settings */
    unsigned int        frame_time;     /* frame timing in ns */
    unsigned int        type;           /* port type */
    const struct uart_ops   *ops;
    unsigned int        custom_divisor;
    unsigned int        line;           /* port index */
    unsigned int        minor;
    resource_size_t     mapbase;        /* for ioremap */
    resource_size_t     mapsize;
    struct device       *dev;           /* serial port physical parent device */
    struct serial_port_device *port_dev;        /* serial core port device */
 
    unsigned long       sysrq;          /* sysrq timeout */
    u8          sysrq_ch;       /* char for sysrq */
    unsigned char       has_sysrq;
    unsigned char       sysrq_seq;      /* index in sysrq_toggle_seq */
 
    unsigned char       hub6;           /* this should be in the 8250 driver */
    unsigned char       suspended;
    unsigned char       console_reinit;
    const char      *name;          /* port name */
    struct attribute_group  *attr_group;        /* port specific attributes */
    const struct attribute_group **tty_groups;  /* all attributes (serial core use only) */
    struct serial_rs485     rs485;
    struct serial_rs485 rs485_supported;    /* Supported mask for serial_rs485 */
    struct gpio_desc    *rs485_term_gpio;   /* enable RS485 bus termination */
    struct gpio_desc    *rs485_rx_during_tx_gpio; /* Output GPIO that sets the state of RS485 RX during TX */
    struct serial_iso7816   iso7816;
    void            *private_data;      /* generic platform data pointer */
};
 
/*
 * Only for console->device_lock()/_unlock() callbacks and internal
 * port lock wrapper synchronization.
 */
static inline void __uart_port_lock_irqsave(struct uart_port *up, unsigned long *flags)
{
    spin_lock_irqsave(&up->lock, *flags);
}
 
/*
 * Only for console->device_lock()/_unlock() callbacks and internal
 * port lock wrapper synchronization.
 */
static inline void __uart_port_unlock_irqrestore(struct uart_port *up, unsigned long flags)
{
    spin_unlock_irqrestore(&up->lock, flags);
}
 
static inline void uart_port_set_cons(struct uart_port *up, struct console *con)
{
    unsigned long flags;
 
    __uart_port_lock_irqsave(up, &flags);
    up->cons = con;
    __uart_port_unlock_irqrestore(up, flags);
}
 
/*
 * nbcon (the atomic console) is reduced to its non-nbcon answer.
 *
 * mainline decides, on every port lock, whether the console attached to the
 * port is an atomic one -- CON_NBCON with a ->write_atomic, on the console
 * list -- and if so takes the console's own atomic context around the lock.
 * DCL has none of that: no CON_NBCON, no ->write_atomic, no nbcon_device_*
 * anywhere in BaseHdr, and a struct console whose only output path is ->write,
 * which must not be reentered.  The port lock is precisely what serialises it.
 *
 * What matters for the vendored sources is that the WRAPPERS stay callable
 * with mainline's signatures -- uart_port_lock(), uart_port_lock_irq(),
 * uart_port_lock_irqsave() and the guard definitions below all route through
 * these three, and 8250_port.c / serial_core.c are compiled byte-identical to
 * upstream.  So the shapes are kept and only the answer changes, and `false`
 * is not a stub standing in for unimplemented behaviour: it is mainline's own
 * first branch for any console that is not CON_NBCON, which is every console
 * DCL can register.  The nbcon arms are unreachable rather than approximated.
 *
 * If DCL ever grows an atomic console this is the function to restore -- the
 * call sites never changed, so only the bodies have to come back.
 */
static inline bool __uart_port_using_nbcon(struct uart_port *up)
{
    (void)up;
    return false;
}
 
static inline bool __uart_port_nbcon_try_acquire(struct uart_port *up)
{
    (void)up;
    return true;
}
 
static inline void __uart_port_nbcon_acquire(struct uart_port *up)
{
    (void)up;
}
 
static inline void __uart_port_nbcon_release(struct uart_port *up)
{
    (void)up;
}
 
static inline void uart_port_lock(struct uart_port *up)
{
    spin_lock(&up->lock);
    __uart_port_nbcon_acquire(up);
}
 
static inline void uart_port_lock_irq(struct uart_port *up)
{
    spin_lock_irq(&up->lock);
    __uart_port_nbcon_acquire(up);
}
 
static inline void uart_port_lock_irqsave(struct uart_port *up, unsigned long *flags)
{
    spin_lock_irqsave(&up->lock, *flags);
    __uart_port_nbcon_acquire(up);
}
 
static inline bool uart_port_trylock(struct uart_port *up)
{
    if (!spin_trylock(&up->lock))
        return false;
 
    if (!__uart_port_nbcon_try_acquire(up)) {
        spin_unlock(&up->lock);
        return false;
    }
 
    return true;
}
 
static inline bool uart_port_trylock_irqsave(struct uart_port *up, unsigned long *flags)
{
    if (!spin_trylock_irqsave(&up->lock, *flags))
        return false;
 
    if (!__uart_port_nbcon_try_acquire(up)) {
        spin_unlock_irqrestore(&up->lock, *flags);
        return false;
    }
 
    return true;
}
 
static inline void uart_port_unlock(struct uart_port *up)
{
    __uart_port_nbcon_release(up);
    spin_unlock(&up->lock);
}
 
static inline void uart_port_unlock_irq(struct uart_port *up)
{
    __uart_port_nbcon_release(up);
    spin_unlock_irq(&up->lock);
}
 
static inline void uart_port_unlock_irqrestore(struct uart_port *up, unsigned long flags)
{
    __uart_port_nbcon_release(up);
    spin_unlock_irqrestore(&up->lock, flags);
}
 
/*
 * Two of mainline's six guard definitions are missing here: DEFINE_GUARD_COND
 * and DEFINE_LOCK_GUARD_1_COND, which produced `uart_port_lock_try` and
 * `uart_port_lock_irqsave_try`.
 *
 * Dropped rather than ported, for the reason <linux/cleanup.h> gives in its
 * own header: "Add them when something does, rather than carrying a
 * speculative surface."  Grep guard( across 8250_port.c, serial_core.c and
 * 8250.h -- uart_port_lock_irq, uart_port_lock_irqsave,
 * uart_port_lock_check_sysrq_irqsave, serial8250_rpm, mutex, rwsem_write,
 * spinlock_irq -- and no _try class is ever taken.  A conditional acquire
 * with no caller is machinery with no test and no way to get it wrong yet.
 *
 * The other four definitions remain mainline's verbatim: only the two that
 * produce types nothing uses were removed.
 */
DEFINE_GUARD(uart_port_lock, struct uart_port *, uart_port_lock(_T), uart_port_unlock(_T));
DEFINE_GUARD(uart_port_lock_irq, struct uart_port *, uart_port_lock_irq(_T),
         uart_port_unlock_irq(_T));
 
DEFINE_LOCK_GUARD_1(uart_port_lock_irqsave, struct uart_port,
                    uart_port_lock_irqsave(_T->lock, &_T->flags),
                    uart_port_unlock_irqrestore(_T->lock, _T->flags),
                    unsigned long flags);
static inline int serial_port_in(struct uart_port *up, int offset)
{
    return up->serial_in(up, offset);
}
 
static inline void serial_port_out(struct uart_port *up, int offset, int value)
{
    up->serial_out(up, offset, value);
}
 
enum uart_pm_state {
    UART_PM_STATE_ON = 0,
    UART_PM_STATE_OFF = 3, /* number taken from ACPI */
    UART_PM_STATE_UNDEFINED,
};
 
/*
 * This is the state information which is persistent across opens.
 */
struct uart_state {
    struct tty_port     port;
 
    enum uart_pm_state  pm_state;
 
    atomic_t        refcount;
    wait_queue_head_t   remove_wait;
    struct uart_port    *uart_port;
};
 
#define UART_XMIT_SIZE  PAGE_SIZE
 
 
/* number of characters left in xmit buffer before we ask for more */
#define WAKEUP_CHARS        256
 
static inline void uart_xmit_advance(struct uart_port *up, unsigned int chars)
{
    struct tty_port *tport = &up->state->port;
 
    kfifo_skip_count(&tport->xmit_fifo, chars);
    up->icount.tx += chars;
}
 
static inline unsigned int uart_fifo_out(struct uart_port *up,
        unsigned char *buf, unsigned int chars)
{
    struct tty_port *tport = &up->state->port;
 
    chars = kfifo_out(&tport->xmit_fifo, buf, chars);
    up->icount.tx += chars;
 
    return chars;
}
 
static inline unsigned int uart_fifo_get(struct uart_port *up,
        unsigned char *ch)
{
    struct tty_port *tport = &up->state->port;
    unsigned int chars;
 
    chars = kfifo_get(&tport->xmit_fifo, ch);
    up->icount.tx += chars;
 
    return chars;
}
 
struct module;
struct tty_driver;
 
struct uart_driver {
    struct module       *owner;
    const char      *driver_name;
    const char      *dev_name;
    int          major;
    int          minor;
    int          nr;
    struct console      *cons;
 
    /*
     * these are private; the low level driver should not
     * touch these; they should be initialised to NULL
     */
    struct uart_state   *state;
    struct tty_driver   *tty_driver;
};
 
void uart_write_wakeup(struct uart_port *port);
 
enum UART_TX_FLAGS {
    UART_TX_NOSTOP = BIT(0),
};
 
#define __uart_port_tx(uport, ch, flags, tx_ready, put_char, tx_done,         \
               for_test, for_post)                    \
({                                        \
    struct uart_port *__port = (uport);                   \
    struct tty_port *__tport = &__port->state->port;              \
    unsigned int pending;                             \
                                          \
    for (; (for_test) && (tx_ready); (for_post), __port->icount.tx++) {   \
        if (__port->x_char) {                         \
            (ch) = __port->x_char;                    \
            (put_char);                       \
            __port->x_char = 0;                   \
            continue;                         \
        }                                 \
                                          \
        if (uart_tx_stopped(__port))                      \
            break;                            \
                                          \
        if (!kfifo_get(&__tport->xmit_fifo, &(ch)))           \
            break;                            \
                                          \
        (put_char);                           \
    }                                     \
                                          \
    (tx_done);                                \
                                          \
    pending = kfifo_len(&__tport->xmit_fifo);                 \
    if (pending < WAKEUP_CHARS) {                         \
        uart_write_wakeup(__port);                    \
                                          \
        if (!((flags) & UART_TX_NOSTOP) && pending == 0)          \
            __port->ops->stop_tx(__port);                 \
    }                                     \
                                          \
    pending;                                  \
})
 
#define uart_port_tx_limited(port, ch, count, tx_ready, put_char, tx_done) ({ \
    unsigned int __count = (count);                       \
    __uart_port_tx(port, ch, 0, tx_ready, put_char, tx_done, __count,     \
            __count--);                       \
})
 
#define uart_port_tx_limited_flags(port, ch, flags, count, tx_ready, put_char, tx_done) ({ \
    unsigned int __count = (count);                            \
    __uart_port_tx(port, ch, flags, tx_ready, put_char, tx_done, __count,          \
            __count--);                            \
})
 
#define uart_port_tx(port, ch, tx_ready, put_char)          \
    __uart_port_tx(port, ch, 0, tx_ready, put_char, ({}), true, ({}))
 
 
#define uart_port_tx_flags(port, ch, flags, tx_ready, put_char)     \
    __uart_port_tx(port, ch, flags, tx_ready, put_char, ({}), true, ({}))
/*
 * Baud rate helpers.
 */
void uart_update_timeout(struct uart_port *port, unsigned int cflag,
             unsigned int baud);
unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
                const struct ktermios *old, unsigned int min,
                unsigned int max);
unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
 
/*
 * Calculates FIFO drain time.
 */
static inline unsigned long uart_fifo_timeout(struct uart_port *port)
{
    u64 fifo_timeout = (u64)READ_ONCE(port->frame_time) * port->fifosize;
 
    /* Add .02 seconds of slop */
    fifo_timeout += 20 * NSEC_PER_MSEC;
 
    return max(nsecs_to_jiffies(fifo_timeout), 1UL);
}
 
/* Base timer interval for polling */
static inline unsigned long uart_poll_timeout(struct uart_port *port)
{
    unsigned long timeout = uart_fifo_timeout(port);
 
    return timeout > 6 ? (timeout / 2 - 2) : 1;
}
 
/*
 * Console helpers.
 */
struct earlycon_device {
    struct console *con;
    struct uart_port port;
    char options[32];       /* e.g., 115200n8 */
    unsigned int baud;
};
 
struct earlycon_id {
    char    name[15];
    char    name_term;  /* In case compiler didn't '\0' term name */
    char    compatible[128];
    int (*setup)(struct earlycon_device *, const char *options);
};
 
extern const struct earlycon_id __earlycon_table[];
extern const struct earlycon_id __earlycon_table_end[];
 
#if defined(CONFIG_SERIAL_EARLYCON) && !defined(MODULE)
#define EARLYCON_USED_OR_UNUSED __used
#else
#define EARLYCON_USED_OR_UNUSED __maybe_unused
#endif
 
#define OF_EARLYCON_DECLARE(_name, compat, fn)              \
    static const struct earlycon_id __UNIQUE_ID(__earlycon_##_name) \
        EARLYCON_USED_OR_UNUSED  __section("__earlycon_table")  \
        __aligned(__alignof__(struct earlycon_id))      \
        = { .name = __stringify(_name),             \
            .compatible = compat,               \
            .setup = fn }
 
#define EARLYCON_DECLARE(_name, fn) OF_EARLYCON_DECLARE(_name, "", fn)
 
int of_setup_earlycon(const struct earlycon_id *match, unsigned long node,
              const char *options);
 
#ifdef CONFIG_SERIAL_EARLYCON
extern bool earlycon_acpi_spcr_enable __initdata;
int setup_earlycon(char *buf);
#else
static const bool earlycon_acpi_spcr_enable EARLYCON_USED_OR_UNUSED;
static inline int setup_earlycon(char *buf) { return 0; }
#endif
 
/* Variant of uart_console_registered() when the console_list_lock is held. */
static inline bool uart_console_registered_locked(struct uart_port *port)
{
    return uart_console(port) && console_is_registered_locked(port->cons);
}
 
static inline bool uart_console_registered(struct uart_port *port)
{
    return uart_console(port) && console_is_registered(port->cons);
}
 
int uart_parse_earlycon(char *p, enum uart_iotype *iotype,
            resource_size_t *addr, char **options);
void uart_parse_options(const char *options, int *baud, int *parity, int *bits,
            int *flow);
int uart_set_options(struct uart_port *port, struct console *co, int baud,
             int parity, int bits, int flow);
struct tty_driver *uart_console_device(struct console *co, int *index);
void uart_console_write(struct uart_port *port, const char *s,
            unsigned int count,
            void (*putchar)(struct uart_port *, unsigned char));
 
/*
 * Port/driver registration/removal
 */
int uart_register_driver(struct uart_driver *uart);
void uart_unregister_driver(struct uart_driver *uart);
int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
void uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
int uart_read_port_properties(struct uart_port *port);
int uart_read_and_validate_port_properties(struct uart_port *port);
bool uart_match_port(const struct uart_port *port1,
        const struct uart_port *port2);
 
/*
 * Power Management
 */
int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
 
static inline int uart_tx_stopped(struct uart_port *port)
{
    struct tty_struct *tty = port->state->port.tty;
    if ((tty && tty->flow.stopped) || port->hw_stopped)
        return 1;
    return 0;
}
 
static inline bool uart_cts_enabled(struct uart_port *uport)
{
    return !!(uport->status & UPSTAT_CTS_ENABLE);
}
 
static inline bool uart_softcts_mode(struct uart_port *uport)
{
    upstat_t mask = UPSTAT_CTS_ENABLE | UPSTAT_AUTOCTS;
 
    return ((uport->status & mask) == UPSTAT_CTS_ENABLE);
}
 
static inline void uart_set_cons_flow_enabled(struct uart_port *uport, bool enabled)
{
    uport->cons_flow = enabled;
}
 
static inline bool uart_cons_flow_enabled(const struct uart_port *uport)
{
    return uport->cons_flow;
}
 
static inline bool uart_console_hwflow_active(struct uart_port *uport)
{
    return uart_console(uport) &&
           !(uport->rs485.flags & SER_RS485_ENABLED) &&
           uart_cons_flow_enabled(uport) &&
           uart_cts_enabled(uport);
}
 
/*
 * The following are helper functions for the low level drivers.
 */
 
void uart_handle_dcd_change(struct uart_port *uport, bool active);
void uart_handle_cts_change(struct uart_port *uport, bool active);
 
void uart_insert_char(struct uart_port *port, unsigned int status,
              unsigned int overrun, u8 ch, u8 flag);
 
void uart_xchar_out(struct uart_port *uport, int offset);
 
#ifdef CONFIG_MAGIC_SYSRQ_SERIAL
#define SYSRQ_TIMEOUT   (HZ * 5)
 
bool uart_try_toggle_sysrq(struct uart_port *port, u8 ch);
 
static inline int uart_handle_sysrq_char(struct uart_port *port, u8 ch)
{
    if (!port->sysrq)
        return 0;
 
    if (ch && time_before(jiffies, port->sysrq)) {
        if (sysrq_mask()) {
            handle_sysrq(ch);
            port->sysrq = 0;
            return 1;
        }
        if (uart_try_toggle_sysrq(port, ch))
            return 1;
    }
    port->sysrq = 0;
 
    return 0;
}
 
static inline int uart_prepare_sysrq_char(struct uart_port *port, u8 ch)
{
    if (!port->sysrq)
        return 0;
 
    if (ch && time_before(jiffies, port->sysrq)) {
        if (sysrq_mask()) {
            port->sysrq_ch = ch;
            port->sysrq = 0;
            return 1;
        }
        if (uart_try_toggle_sysrq(port, ch))
            return 1;
    }
    port->sysrq = 0;
 
    return 0;
}
 
static inline void uart_unlock_and_check_sysrq(struct uart_port *port)
{
    u8 sysrq_ch;
 
    if (!port->has_sysrq) {
        uart_port_unlock(port);
        return;
    }
 
    sysrq_ch = port->sysrq_ch;
    port->sysrq_ch = 0;
 
    uart_port_unlock(port);
 
    if (sysrq_ch)
        handle_sysrq(sysrq_ch);
}
 
static inline void uart_unlock_and_check_sysrq_irqrestore(struct uart_port *port,
        unsigned long flags)
{
    u8 sysrq_ch;
 
    if (!port->has_sysrq) {
        uart_port_unlock_irqrestore(port, flags);
        return;
    }
 
    sysrq_ch = port->sysrq_ch;
    port->sysrq_ch = 0;
 
    uart_port_unlock_irqrestore(port, flags);
 
    if (sysrq_ch)
        handle_sysrq(sysrq_ch);
}
#else   /* CONFIG_MAGIC_SYSRQ_SERIAL */
static inline int uart_handle_sysrq_char(struct uart_port *port, u8 ch)
{
    return 0;
}
static inline int uart_prepare_sysrq_char(struct uart_port *port, u8 ch)
{
    return 0;
}
static inline void uart_unlock_and_check_sysrq(struct uart_port *port)
{
    uart_port_unlock(port);
}
static inline void uart_unlock_and_check_sysrq_irqrestore(struct uart_port *port,
        unsigned long flags)
{
    uart_port_unlock_irqrestore(port, flags);
}
#endif  /* CONFIG_MAGIC_SYSRQ_SERIAL */
 
/*
 * Variant of guard(uart_port_lock_irqsave) for IRQ handlers that may capture
 * a SysRq character via uart_prepare_sysrq_char(). The destructor uses the
 * sysrq-aware unlock helper so that a captured port->sysrq_ch is dispatched
 * to handle_sysrq() on scope exit. The plain guard variant silently drops
 * sysrq_ch and must not be used by callers that process RX.
 */
DEFINE_LOCK_GUARD_1(uart_port_lock_check_sysrq_irqsave, struct uart_port,
                    uart_port_lock_irqsave(_T->lock, &_T->flags),
                    uart_unlock_and_check_sysrq_irqrestore(_T->lock, _T->flags),
                    unsigned long flags);
 
/*
 * We do the SysRQ and SAK checking like this...
 */
static inline int uart_handle_break(struct uart_port *port)
{
    struct uart_state *state = port->state;
 
    if (port->handle_break)
        port->handle_break(port);
 
#ifdef CONFIG_MAGIC_SYSRQ_SERIAL
    if (port->has_sysrq && uart_console(port)) {
        if (!port->sysrq) {
            port->sysrq = jiffies + SYSRQ_TIMEOUT;
            return 1;
        }
        port->sysrq = 0;
    }
#endif
    if (port->flags & UPF_SAK)
        do_SAK(state->port.tty);
    return 0;
}
 
/*
 *  UART_ENABLE_MS - determine if port should enable modem status irqs
 */
#define UART_ENABLE_MS(port,cflag)  ((port)->flags & UPF_HARDPPS_CD || \
                     (cflag) & CRTSCTS || \
                     !((cflag) & CLOCAL))
 
int uart_get_rs485_mode(struct uart_port *port);
#endif /* LINUX_SERIAL_CORE_H */