drm_i915_gem_set_domain Struct Reference

#include <i915_drm.h>

Public Attributes
__u32	handle
__u32	read_domains
__u32	write_domain

Detailed Description

struct drm_i915_gem_set_domain - Adjust the objects write or read domain, in preparation for accessing the pages via some CPU domain.

Specifying a new write or read domain will flush the object out of the previous domain(if required), before then updating the objects domain tracking with the new domain.

Note this might involve waiting for the object first if it is still active on the GPU.

Supported values for @read_domains and @write_domain:

• I915_GEM_DOMAIN_WC: Uncached write-combined domain
• I915_GEM_DOMAIN_CPU: CPU cache domain
• I915_GEM_DOMAIN_GTT: Mappable aperture domain

All other domains are rejected.

Note that for discrete, starting from DG1, this is no longer supported, and is instead rejected. On such platforms the CPU domain is effectively static, where we also only support a single &drm_i915_gem_mmap_offset cache mode, which can't be set explicitly and instead depends on the object placements, as per the below.

Implicit caching rules, starting from DG1:

• If any of the object placements (see &drm_i915_gem_create_ext_memory_regions) contain I915_MEMORY_CLASS_DEVICE then the object will be allocated and mapped as write-combined only.
• Everything else is always allocated and mapped as write-back, with the guarantee that everything is also coherent with the GPU.

Note that this is likely to change in the future again, where we might need more flexibility on future devices, so making this all explicit as part of a new &drm_i915_gem_create_ext extension is probable.

Member Data Documentation

handle

__u32 drm_i915_gem_set_domain::handle

@handle: Handle for the object.

read_domains

__u32 drm_i915_gem_set_domain::read_domains

@read_domains: New read domains.

write_domain

__u32 drm_i915_gem_set_domain::write_domain

@write_domain: New write domain.

Note that having something in the write domain implies it's in the read domain, and only that read domain.

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The documentation for this struct was generated from the following file:

• XenevaOS/BaseHdr/uapi/drm/i915_drm.h