SdramSpdDdr4.h

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#ifndef _SDRAM_SPD_DDR4_H_
#define _SDRAM_SPD_DDR4_H_
 
#pragma pack (push, 1)
 
typedef union {
  struct {
    UINT8  BytesUsed                           :  4; 
    UINT8  BytesTotal                          :  3; 
    UINT8  CrcCoverage                         :  1; 
  } Bits;
  UINT8  Data;
} SPD4_DEVICE_DESCRIPTION_STRUCT;
 
typedef union {
  struct {
    UINT8  Minor                               :  4; 
    UINT8  Major                               :  4; 
  } Bits;
  UINT8  Data;
} SPD4_REVISION_STRUCT;
 
typedef union {
  struct {
    UINT8  Type                                :  8; 
  } Bits;
  UINT8  Data;
} SPD4_DRAM_DEVICE_TYPE_STRUCT;
 
typedef union {
  struct {
    UINT8  ModuleType                          :  4; 
    UINT8  HybridMedia                         :  3; 
    UINT8  Hybrid                              :  1; 
  } Bits;
  UINT8  Data;
} SPD4_MODULE_TYPE_STRUCT;
 
typedef union {
  struct {
    UINT8  Density                             :  4; 
    UINT8  BankAddress                         :  2; 
    UINT8  BankGroup                           :  2; 
  } Bits;
  UINT8  Data;
} SPD4_SDRAM_DENSITY_BANKS_STRUCT;
 
typedef union {
  struct {
    UINT8  ColumnAddress                       :  3; 
    UINT8  RowAddress                          :  3; 
    UINT8  Reserved                            :  2; 
  } Bits;
  UINT8  Data;
} SPD4_SDRAM_ADDRESSING_STRUCT;
 
typedef union {
  struct {
    UINT8  SignalLoading                       :  2; 
    UINT8  Reserved                            :  2; 
    UINT8  DieCount                            :  3; 
    UINT8  SdramPackageType                    :  1; 
  } Bits;
  UINT8  Data;
} SPD4_PRIMARY_SDRAM_PACKAGE_TYPE_STRUCT;
 
typedef union {
  struct {
    UINT8  MaximumActivateCount                :  4; 
    UINT8  MaximumActivateWindow               :  2; 
    UINT8  Reserved                            :  2; 
  } Bits;
  UINT8  Data;
} SPD4_SDRAM_OPTIONAL_FEATURES_STRUCT;
 
typedef union {
  struct {
    UINT8  Reserved                            :  8; 
  } Bits;
  UINT8  Data;
} SPD4_SDRAM_THERMAL_REFRESH_STRUCT;
 
typedef union {
  struct {
    UINT8  Reserved                            :  5; 
    UINT8  SoftPPR                             :  1; 
    UINT8  PostPackageRepair                   :  2; 
  } Bits;
  UINT8  Data;
} SPD4_OTHER_SDRAM_OPTIONAL_FEATURES_STRUCT;
 
typedef union {
  struct {
    UINT8  SignalLoading                       :  2; 
    UINT8  DRAMDensityRatio                    :  2; 
    UINT8  DieCount                            :  3; 
    UINT8  SdramPackageType                    :  1; 
  } Bits;
  UINT8  Data;
} SPD4_SECONDARY_SDRAM_PACKAGE_TYPE_STRUCT;
 
typedef union {
  struct {
    UINT8  OperationAt1_20                     :  1; 
    UINT8  EndurantAt1_20                      :  1; 
    UINT8  Reserved                            :  6; 
  } Bits;
  UINT8  Data;
} SPD4_MODULE_NOMINAL_VOLTAGE_STRUCT;
 
typedef union {
  struct {
    UINT8  SdramDeviceWidth                    :  3; 
    UINT8  RankCount                           :  3; 
    UINT8  RankMix                             :  1; 
    UINT8  Reserved                            :  1; 
  } Bits;
  UINT8  Data;
} SPD4_MODULE_ORGANIZATION_STRUCT;
 
typedef union {
  struct {
    UINT8  PrimaryBusWidth                     :  3; 
    UINT8  BusWidthExtension                   :  2; 
    UINT8  Reserved                            :  3; 
  } Bits;
  UINT8  Data;
} SPD4_MODULE_MEMORY_BUS_WIDTH_STRUCT;
 
typedef union {
  struct {
    UINT8  Reserved                            :  7; 
    UINT8  ThermalSensorPresence               :  1; 
  } Bits;
  UINT8  Data;
} SPD4_MODULE_THERMAL_SENSOR_STRUCT;
 
typedef union {
  struct {
    UINT8  ExtendedBaseModuleType              :  4; 
    UINT8  Reserved                            :  4; 
  } Bits;
  UINT8  Data;
} SPD4_EXTENDED_MODULE_TYPE_STRUCT;
 
typedef union {
  struct {
    UINT8  Fine                                :  2; 
    UINT8  Medium                              :  2; 
    UINT8  Reserved                            :  4; 
  } Bits;
  UINT8  Data;
} SPD4_TIMEBASE_STRUCT;
 
typedef union {
  struct {
    UINT8  tCKmin                              :  8; 
  } Bits;
  UINT8  Data;
} SPD4_TCK_MIN_MTB_STRUCT;
 
typedef union {
  struct {
    UINT8  tCKmax                              :  8; 
  } Bits;
  UINT8  Data;
} SPD4_TCK_MAX_MTB_STRUCT;
 
typedef union {
  struct {
    UINT32 Cl7                                 :  1; 
    UINT32 Cl8                                 :  1; 
    UINT32 Cl9                                 :  1; 
    UINT32 Cl10                                :  1; 
    UINT32 Cl11                                :  1; 
    UINT32 Cl12                                :  1; 
    UINT32 Cl13                                :  1; 
    UINT32 Cl14                                :  1; 
    UINT32 Cl15                                :  1; 
    UINT32 Cl16                                :  1; 
    UINT32 Cl17                                :  1; 
    UINT32 Cl18                                :  1; 
    UINT32 Cl19                                :  1; 
    UINT32 Cl20                                :  1; 
    UINT32 Cl21                                :  1; 
    UINT32 Cl22                                :  1; 
    UINT32 Cl23                                :  1; 
    UINT32 Cl24                                :  1; 
    UINT32 Cl25                                :  1; 
    UINT32 Cl26                                :  1; 
    UINT32 Cl27                                :  1; 
    UINT32 Cl28                                :  1; 
    UINT32 Cl29                                :  1; 
    UINT32 Cl30                                :  1; 
    UINT32 Cl31                                :  1; 
    UINT32 Cl32                                :  1; 
    UINT32 Cl33                                :  1; 
    UINT32 Cl34                                :  1; 
    UINT32 Cl35                                :  1; 
    UINT32 Cl36                                :  1; 
    UINT32 Reserved                            :  1; 
    UINT32 ClRange                             :  1; 
  } Bits;
  struct {
    UINT32 Cl23                                :  1; 
    UINT32 Cl24                                :  1; 
    UINT32 Cl25                                :  1; 
    UINT32 Cl26                                :  1; 
    UINT32 Cl27                                :  1; 
    UINT32 Cl28                                :  1; 
    UINT32 Cl29                                :  1; 
    UINT32 Cl30                                :  1; 
    UINT32 Cl31                                :  1; 
    UINT32 Cl32                                :  1; 
    UINT32 Cl33                                :  1; 
    UINT32 Cl34                                :  1; 
    UINT32 Cl35                                :  1; 
    UINT32 Cl36                                :  1; 
    UINT32 Cl37                                :  1; 
    UINT32 Cl38                                :  1; 
    UINT32 Cl39                                :  1; 
    UINT32 Cl40                                :  1; 
    UINT32 Cl41                                :  1; 
    UINT32 Cl42                                :  1; 
    UINT32 Cl43                                :  1; 
    UINT32 Cl44                                :  1; 
    UINT32 Cl45                                :  1; 
    UINT32 Cl46                                :  1; 
    UINT32 Cl47                                :  1; 
    UINT32 Cl48                                :  1; 
    UINT32 Cl49                                :  1; 
    UINT32 Cl50                                :  1; 
    UINT32 Cl51                                :  1; 
    UINT32 Cl52                                :  1; 
    UINT32 Reserved                            :  1; 
    UINT32 ClRange                             :  1; 
  } HighRangeBits;
  UINT32 Data;
  UINT16 Data16[2];
  UINT8  Data8[4];
} SPD4_CAS_LATENCIES_SUPPORTED_STRUCT;
 
typedef union {
  struct {
    UINT8  tAAmin                              :  8; 
  } Bits;
  UINT8  Data;
} SPD4_TAA_MIN_MTB_STRUCT;
 
typedef union {
  struct {
    UINT8  tRCDmin                             :  8; 
  } Bits;
  UINT8  Data;
} SPD4_TRCD_MIN_MTB_STRUCT;
 
typedef union {
  struct {
    UINT8  tRPmin                              :  8; 
  } Bits;
  UINT8  Data;
} SPD4_TRP_MIN_MTB_STRUCT;
 
typedef union {
  struct {
    UINT8  tRASminUpper                        :  4; 
    UINT8  tRCminUpper                         :  4; 
  } Bits;
  UINT8  Data;
} SPD4_TRAS_TRC_MIN_MTB_STRUCT;
 
typedef union {
  struct {
    UINT8  tRASmin                             :  8; 
  } Bits;
  UINT8  Data;
} SPD4_TRAS_MIN_MTB_STRUCT;
 
typedef union {
  struct {
    UINT8  tRCmin                              :  8; 
  } Bits;
  UINT8  Data;
} SPD4_TRC_MIN_MTB_STRUCT;
 
typedef union {
  struct {
    UINT16 tRFCmin                             :  16; 
  } Bits;
  UINT16 Data;
  UINT8  Data8[2];
} SPD4_TRFC_MIN_MTB_STRUCT;
 
typedef union {
  struct {
    UINT8  tFAWminUpper                        :  4; 
    UINT8  Reserved                            :  4; 
  } Bits;
  UINT8  Data;
} SPD4_TFAW_MIN_MTB_UPPER_STRUCT;
 
typedef union {
  struct {
    UINT8  tFAWmin                             :  8; 
  } Bits;
  UINT8  Data;
} SPD4_TFAW_MIN_MTB_STRUCT;
 
typedef union {
  struct {
    UINT8  tRRDmin                             :  8; 
  } Bits;
  UINT8  Data;
} SPD4_TRRD_MIN_MTB_STRUCT;
 
typedef union {
  struct {
    UINT8  tCCDmin                             :  8; 
  } Bits;
  UINT8  Data;
} SPD4_TCCD_MIN_MTB_STRUCT;
 
typedef union {
  struct {
    UINT8  tWRminMostSignificantNibble         :  4; 
    UINT8  Reserved                            :  4; 
  } Bits;
  UINT8  Data;
} SPD4_TWR_UPPER_NIBBLE_STRUCT;
 
typedef union {
  struct {
    UINT8  tWRmin                              :  8; 
  } Bits;
  UINT8  Data;
} SPD4_TWR_MIN_MTB_STRUCT;
 
typedef union {
  struct {
    UINT8  tWTR_SminMostSignificantNibble      :  4; 
    UINT8  tWTR_LminMostSignificantNibble      :  4; 
  } Bits;
  UINT8  Data;
} SPD4_TWTR_UPPER_NIBBLE_STRUCT;
 
typedef union {
  struct {
    UINT8  tWTRmin                             :  8; 
  } Bits;
  UINT8  Data;
} SPD4_TWTR_MIN_MTB_STRUCT;
 
typedef union {
  struct {
    UINT8  BitOrderatSDRAM                     :  5; 
    UINT8  WiredtoUpperLowerNibble             :  1; 
    UINT8  PackageRankMap                      :  2; 
  } Bits;
  UINT8  Data;
} SPD4_CONNECTOR_BIT_MAPPING_BYTE_STRUCT;
 
typedef union {
  struct {
    INT8  tCCDminFine                          :  8; 
  } Bits;
  INT8  Data;
} SPD4_TCCD_MIN_FTB_STRUCT;
 
typedef union {
  struct {
    INT8  tRRDminFine                          :  8; 
  } Bits;
  INT8  Data;
} SPD4_TRRD_MIN_FTB_STRUCT;
 
typedef union {
  struct {
    INT8  tRCminFine                           :  8; 
  } Bits;
  INT8  Data;
} SPD4_TRC_MIN_FTB_STRUCT;
 
typedef union {
  struct {
    INT8  tRPminFine                           :  8; 
  } Bits;
  INT8  Data;
} SPD4_TRP_MIN_FTB_STRUCT;
 
typedef union {
  struct {
    INT8  tRCDminFine                          :  8; 
  } Bits;
  INT8  Data;
} SPD4_TRCD_MIN_FTB_STRUCT;
 
typedef union {
  struct {
    INT8  tAAminFine                           :  8; 
  } Bits;
  INT8  Data;
} SPD4_TAA_MIN_FTB_STRUCT;
 
typedef union {
  struct {
    INT8  tCKmaxFine                           :  8; 
  } Bits;
  INT8  Data;
} SPD4_TCK_MAX_FTB_STRUCT;
 
typedef union {
  struct {
    INT8  tCKminFine                           :  8; 
  } Bits;
  INT8  Data;
} SPD4_TCK_MIN_FTB_STRUCT;
 
typedef union {
  struct {
    UINT8  Height                              :  5; 
    UINT8  RawCardExtension                    :  3; 
  } Bits;
  UINT8  Data;
} SPD4_UNBUF_MODULE_NOMINAL_HEIGHT;
 
typedef union {
  struct {
    UINT8  FrontThickness                      :  4; 
    UINT8  BackThickness                       :  4; 
  } Bits;
  UINT8  Data;
} SPD4_UNBUF_MODULE_NOMINAL_THICKNESS;
 
typedef union {
  struct {
    UINT8  Card                                :  5; 
    UINT8  Revision                            :  2; 
    UINT8  Extension                           :  1; 
  } Bits;
  UINT8  Data;
} SPD4_UNBUF_REFERENCE_RAW_CARD;
 
typedef union {
  struct {
    UINT8  MappingRank1                        :  1; 
    UINT8  Reserved                            :  7; 
  } Bits;
  UINT8  Data;
} SPD4_UNBUF_ADDRESS_MAPPING;
 
typedef union {
  struct {
    UINT8  Height                              :  5; 
    UINT8  Reserved                            :  3; 
  } Bits;
  UINT8  Data;
} SPD4_RDIMM_MODULE_NOMINAL_HEIGHT;
 
typedef union {
  struct {
    UINT8  FrontThickness                      :  4; 
    UINT8  BackThickness                       :  4; 
  } Bits;
  UINT8  Data;
} SPD4_RDIMM_MODULE_NOMINAL_THICKNESS;
 
typedef union {
  struct {
    UINT8  Card                                :  5; 
    UINT8  Revision                            :  2; 
    UINT8  Extension                           :  1; 
  } Bits;
  UINT8  Data;
} SPD4_RDIMM_REFERENCE_RAW_CARD;
 
typedef union {
  struct {
    UINT8  RegisterCount                       :  2; 
    UINT8  DramRowCount                        :  2; 
    UINT8  RegisterType                        :  4; 
  } Bits;
  UINT8  Data;
} SPD4_RDIMM_MODULE_ATTRIBUTES;
 
typedef union {
  struct {
    UINT8  HeatSpreaderThermalCharacteristics  :  7; 
    UINT8  HeatSpreaderSolution                :  1; 
  } Bits;
  UINT8  Data;
} SPD4_RDIMM_THERMAL_HEAT_SPREADER_SOLUTION;
 
typedef union {
  struct {
    UINT16 ContinuationCount                   :  7; 
    UINT16 ContinuationParity                  :  1; 
    UINT16 LastNonZeroByte                     :  8; 
  } Bits;
  UINT16 Data;
  UINT8  Data8[2];
} SPD4_MANUFACTURER_ID_CODE;
 
typedef union {
  struct {
    UINT8  RegisterRevisionNumber;             
  } Bits;
  UINT8  Data;
} SPD4_RDIMM_REGISTER_REVISION_NUMBER;
 
typedef union {
  struct {
    UINT8 Rank1Mapping                        :  1; 
    UINT8 Reserved                            :  7; 
  } Bits;
  UINT8  Data;
} SPD4_RDIMM_ADDRESS_MAPPING_FROM_REGISTER_TO_DRAM;
 
typedef union {
  struct {
    UINT8 Cke                                 :  2; 
    UINT8 Odt                                 :  2; 
    UINT8 CommandAddress                      :  2; 
    UINT8 ChipSelect                          :  2; 
  } Bits;
  UINT8  Data;
} SPD4_RDIMM_REGISTER_OUTPUT_DRIVE_STRENGTH_FOR_CONTROL_COMMAND_ADDRESS;
 
typedef union {
  struct {
    UINT8 Y0Y2                                :  2; 
    UINT8 Y1Y3                                :  2; 
    UINT8 Reserved0                           :  2; 
    UINT8 RcdOutputSlewRateControl            :  1; 
    UINT8 Reserved1                           :  1; 
  } Bits;
  UINT8  Data;
} SPD4_RDIMM_REGISTER_OUTPUT_DRIVE_STRENGTH_FOR_CLOCK;
 
typedef union {
  struct {
    UINT8  Height                             :  5; 
    UINT8  Reserved                           :  3; 
  } Bits;
  UINT8  Data;
} SPD4_LRDIMM_MODULE_NOMINAL_HEIGHT;
 
typedef union {
  struct {
    UINT8  FrontThickness                     :  4; 
    UINT8  BackThickness                      :  4; 
  } Bits;
  UINT8  Data;
} SPD4_LRDIMM_MODULE_NOMINAL_THICKNESS;
 
typedef union {
  struct {
    UINT8  Card                               :  5; 
    UINT8  Revision                           :  2; 
    UINT8  Extension                          :  1; 
  } Bits;
  UINT8  Data;
} SPD4_LRDIMM_REFERENCE_RAW_CARD;
 
typedef union {
  struct {
    UINT8  RegisterCount                      :  2; 
    UINT8  DramRowCount                       :  2; 
    UINT8  RegisterType                       :  4; 
  } Bits;
  UINT8  Data;
} SPD4_LRDIMM_MODULE_ATTRIBUTES;
 
typedef union {
  struct {
    UINT8  HeatSpreaderThermalCharacteristics :  7; 
    UINT8  HeatSpreaderSolution               :  1; 
  } Bits;
  UINT8  Data;
} SPD4_LRDIMM_THERMAL_HEAT_SPREADER_SOLUTION;
 
typedef union {
  struct {
    UINT8  RegisterRevisionNumber;                  
  } Bits;
  UINT8  Data;
} SPD4_LRDIMM_REGISTER_REVISION_NUMBER;
 
typedef union {
  struct {
    UINT8 Rank1Mapping                        :  1; 
    UINT8 Reserved                            :  7; 
  } Bits;
  UINT8  Data;
} SPD4_LRDIMM_ADDRESS_MAPPING_FROM_REGISTER_TO_DRAM;
 
typedef union {
  struct {
    UINT8 Cke                                 :  2; 
    UINT8 Odt                                 :  2; 
    UINT8 CommandAddress                      :  2; 
    UINT8 ChipSelect                          :  2; 
  } Bits;
  UINT8  Data;
} SPD4_LRDIMM_REGISTER_OUTPUT_DRIVE_STRENGTH_FOR_CONTROL_COMMAND_ADDRESS;
 
typedef union {
  struct {
    UINT8 Y0Y2                                :  2; 
    UINT8 Y1Y3                                :  2; 
    UINT8 Reserved0                           :  2; 
    UINT8 RcdOutputSlewRateControl            :  1; 
    UINT8 Reserved1                           :  1; 
  } Bits;
  UINT8  Data;
} SPD4_LRDIMM_REGISTER_OUTPUT_DRIVE_STRENGTH_FOR_CLOCK;
 
typedef struct {
  UINT8  DataBufferRevisionNumber;
} SPD4_LRDIMM_DATA_BUFFER_REVISION_NUMBER;
 
typedef union {
  struct {
    UINT8  DramVrefDQForPackageRank0          :  6; 
    UINT8  Reserved                           :  2; 
  } Bits;
  UINT8  Data;
} SPD4_LRDIMM_DRAM_VREFDQ_FOR_PACKAGE_RANK;
 
typedef struct {
  UINT8  DataBufferVrefDQforDramInterface;
} SPD4_LRDIMM_DATA_BUFFER_VREFDQ_FOR_DRAM_INTERFACE;
 
typedef union {
  struct {
    UINT8  DramInterfaceMdqDriveStrength           :  4; 
    UINT8  DramInterfaceMdqReadTerminationStrength :  4; 
  } Bits;
  UINT8  Data;
} SPD4_LRDIMM_DATA_BUFFER_MDQ_DRIVE_STRENGTH_RTT_FOR_DATA_RATE;
 
typedef union {
  struct {
    UINT8  DataRateLe1866                           :  2; 
    UINT8  DataRateLe2400                           :  2; 
    UINT8  DataRateLe3200                           :  2; 
    UINT8  Reserved                                 :  2; 
  } Bits;
  UINT8  Data;
} SPD4_LRDIMM_DRAM_DRIVE_STRENGTH;
 
typedef union {
  struct {
    UINT8  Rtt_Nom                                  :  3; 
    UINT8  Rtt_WR                                   :  3; 
    UINT8  Reserved                                 :  2; 
  } Bits;
  UINT8  Data;
} SPD4_LRDIMM_DRAM_ODT_RTT_WR_RTT_NOM_FOR_DATA_RATE;
 
typedef union {
  struct {
    UINT8  PackageRanks0_1                          :  3; 
    UINT8  PackageRanks2_3                          :  3; 
    UINT8  Reserved                                 :  2; 
  } Bits;
  UINT8  Data;
} SPD4_LRDIMM_DRAM_ODT_RTT_PARK_FOR_DATA_RATE;
 
typedef union {
  struct {
    UINT8  Rank0                                    :  1; 
    UINT8  Rank1                                    :  1; 
    UINT8  Rank2                                    :  1; 
    UINT8  Rank3                                    :  1; 
    UINT8  DataBuffer                               :  1; 
    UINT8  Reserved                                 :  3; 
  } Bits;
  UINT8  Data;
} SPD4_LRDIMM_DATA_BUFFER_VREFDQ_FOR_DRAM_INTERFACE_RANGE;
 
typedef union {
  struct {
    UINT8  DataBufferGainAdjustment                 :  1; 
    UINT8  DataBufferDfe                            :  1; 
    UINT8  Reserved                                 :  6; 
  } Bits;
  UINT8  Data;
} SPD4_LRDIMM_DATA_BUFFER_DQ_DECISION_FEEDBACK_EQUALIZATION;
 
typedef UINT16 SPD4_NVDIMM_MODULE_PRODUCT_IDENTIFIER;
 
typedef union {
  struct {
    UINT16 ContinuationCount                   :  7; 
    UINT16 ContinuationParity                  :  1; 
    UINT16 LastNonZeroByte                     :  8; 
  } Bits;
  UINT16 Data;
  UINT8  Data8[2];
} SPD4_NVDIMM_SUBSYSTEM_CONTROLLER_MANUFACTURER_ID_CODE;
 
typedef UINT16 SPD4_NVDIMM_SUBSYSTEM_CONTROLLER_IDENTIFIER;
 
typedef UINT8 SPD4_NVDIMM_SUBSYSTEM_CONTROLLER_REVISION_CODE;
 
typedef union {
  struct {
    UINT8  Card                                :  5; 
    UINT8  Revision                            :  2; 
    UINT8  Extension                           :  1; 
  } Bits;
  UINT8  Data;
} SPD4_NVDIMM_REFERENCE_RAW_CARD;
 
typedef union {
  struct {
    UINT8  Reserved                            :  4; 
    UINT8  Extension                           :  4; 
  } Bits;
  UINT8  Data;
} SPD4_NVDIMM_MODULE_CHARACTERISTICS;
 
typedef struct {
  UINT8  Reserved;
  UINT8  MediaType;
} SPD4_NVDIMM_HYBRID_MODULE_MEDIA_TYPES;
 
typedef UINT8 SPD4_NVDIMM_MAXIMUM_NONVOLATILE_MEMORY_INITIALIZATION_TIME;
 
typedef union {
  struct {
    UINT16 FunctionInterface                   :  5; 
    UINT16 FunctionClass                       :  5; 
    UINT16 BlockOffset                         :  4; 
    UINT16 Reserved                            :  1; 
    UINT16 Implemented                         :  1; 
  } Bits;
  UINT16 Data;
  UINT8  Data8[2];
} SPD4_NVDIMM_FUNCTION_INTERFACE_DESCRIPTOR;
 
typedef struct {
  UINT8  Year;                                 
  UINT8  Week;                                 
} SPD4_MANUFACTURING_DATE;
 
typedef union {
  UINT32 Data;
  UINT16 SerialNumber16[2];
  UINT8  SerialNumber8[4];
} SPD4_MANUFACTURER_SERIAL_NUMBER;
 
typedef struct {
  UINT8 Location;                              
} SPD4_MANUFACTURING_LOCATION;
 
typedef struct {
  SPD4_MANUFACTURER_ID_CODE            IdCode;                   
  SPD4_MANUFACTURING_LOCATION          Location;                 
  SPD4_MANUFACTURING_DATE              Date;                     
  SPD4_MANUFACTURER_SERIAL_NUMBER      SerialNumber;             
} SPD4_UNIQUE_MODULE_ID;
 
typedef union {
  UINT16 Crc[1];
  UINT8  Data8[2];
} SPD4_CYCLIC_REDUNDANCY_CODE;
 
typedef struct {
  SPD4_DEVICE_DESCRIPTION_STRUCT            Description;              
  SPD4_REVISION_STRUCT                      Revision;                 
  SPD4_DRAM_DEVICE_TYPE_STRUCT              DramDeviceType;           
  SPD4_MODULE_TYPE_STRUCT                   ModuleType;               
  SPD4_SDRAM_DENSITY_BANKS_STRUCT           SdramDensityAndBanks;     
  SPD4_SDRAM_ADDRESSING_STRUCT              SdramAddressing;          
  SPD4_PRIMARY_SDRAM_PACKAGE_TYPE_STRUCT    PrimarySdramPackageType;  
  SPD4_SDRAM_OPTIONAL_FEATURES_STRUCT       SdramOptionalFeatures;    
  SPD4_SDRAM_THERMAL_REFRESH_STRUCT         ThermalAndRefreshOptions; 
  SPD4_OTHER_SDRAM_OPTIONAL_FEATURES_STRUCT OtherOptionalFeatures;    
  SPD4_SECONDARY_SDRAM_PACKAGE_TYPE_STRUCT  SecondarySdramPackageType;
  SPD4_MODULE_NOMINAL_VOLTAGE_STRUCT        ModuleNominalVoltage;     
  SPD4_MODULE_ORGANIZATION_STRUCT           ModuleOrganization;       
  SPD4_MODULE_MEMORY_BUS_WIDTH_STRUCT       ModuleMemoryBusWidth;     
  SPD4_MODULE_THERMAL_SENSOR_STRUCT         ModuleThermalSensor;      
  SPD4_EXTENDED_MODULE_TYPE_STRUCT          ExtendedModuleType;       
  UINT8                                     Reserved0;                
  SPD4_TIMEBASE_STRUCT                      Timebase;                 
  SPD4_TCK_MIN_MTB_STRUCT                   tCKmin;                   
  SPD4_TCK_MAX_MTB_STRUCT                   tCKmax;                   
  SPD4_CAS_LATENCIES_SUPPORTED_STRUCT       CasLatencies;             
  SPD4_TAA_MIN_MTB_STRUCT                   tAAmin;                   
  SPD4_TRCD_MIN_MTB_STRUCT                  tRCDmin;                  
  SPD4_TRP_MIN_MTB_STRUCT                   tRPmin;                   
  SPD4_TRAS_TRC_MIN_MTB_STRUCT              tRASMintRCMinUpper;       
  SPD4_TRAS_MIN_MTB_STRUCT                  tRASmin;                  
  SPD4_TRC_MIN_MTB_STRUCT                   tRCmin;                   
  SPD4_TRFC_MIN_MTB_STRUCT                  tRFC1min;                 
  SPD4_TRFC_MIN_MTB_STRUCT                  tRFC2min;                 
  SPD4_TRFC_MIN_MTB_STRUCT                  tRFC4min;                 
  SPD4_TFAW_MIN_MTB_UPPER_STRUCT            tFAWMinUpper;             
  SPD4_TFAW_MIN_MTB_STRUCT                  tFAWmin;                  
  SPD4_TRRD_MIN_MTB_STRUCT                  tRRD_Smin;                
  SPD4_TRRD_MIN_MTB_STRUCT                  tRRD_Lmin;                
  SPD4_TCCD_MIN_MTB_STRUCT                  tCCD_Lmin;                
  SPD4_TWR_UPPER_NIBBLE_STRUCT              tWRUpperNibble;           
  SPD4_TWR_MIN_MTB_STRUCT                   tWRmin;                   
  SPD4_TWTR_UPPER_NIBBLE_STRUCT             tWTRUpperNibble;          
  SPD4_TWTR_MIN_MTB_STRUCT                  tWTR_Smin;                
  SPD4_TWTR_MIN_MTB_STRUCT                  tWTR_Lmin;                
  UINT8                                     Reserved1[59 - 46 + 1];   
  SPD4_CONNECTOR_BIT_MAPPING_BYTE_STRUCT    BitMapping[77 - 60 + 1];  
  UINT8                                     Reserved2[116 - 78 + 1];  
  SPD4_TCCD_MIN_FTB_STRUCT                  tCCD_LminFine;            
  SPD4_TRRD_MIN_FTB_STRUCT                  tRRD_LminFine;            
  SPD4_TRRD_MIN_FTB_STRUCT                  tRRD_SminFine;            
  SPD4_TRC_MIN_FTB_STRUCT                   tRCminFine;               
  SPD4_TRP_MIN_FTB_STRUCT                   tRPminFine;               
  SPD4_TRCD_MIN_FTB_STRUCT                  tRCDminFine;              
  SPD4_TAA_MIN_FTB_STRUCT                   tAAminFine;               
  SPD4_TCK_MAX_FTB_STRUCT                   tCKmaxFine;               
  SPD4_TCK_MIN_FTB_STRUCT                   tCKminFine;               
  SPD4_CYCLIC_REDUNDANCY_CODE               Crc;                      
} SPD4_BASE_SECTION;
 
typedef struct {
  SPD4_UNBUF_MODULE_NOMINAL_HEIGHT     ModuleNominalHeight;      
  SPD4_UNBUF_MODULE_NOMINAL_THICKNESS  ModuleMaximumThickness;   
  SPD4_UNBUF_REFERENCE_RAW_CARD        ReferenceRawCardUsed;     
  SPD4_UNBUF_ADDRESS_MAPPING           AddressMappingEdgeConn;   
  UINT8                                Reserved[253 - 132 + 1];  
  SPD4_CYCLIC_REDUNDANCY_CODE          Crc;                      
} SPD4_MODULE_UNBUFFERED;
 
typedef struct {
  SPD4_RDIMM_MODULE_NOMINAL_HEIGHT     ModuleNominalHeight;      
  SPD4_RDIMM_MODULE_NOMINAL_THICKNESS  ModuleMaximumThickness;   
  SPD4_RDIMM_REFERENCE_RAW_CARD        ReferenceRawCardUsed;     
  SPD4_RDIMM_MODULE_ATTRIBUTES         DimmModuleAttributes;     
  SPD4_RDIMM_THERMAL_HEAT_SPREADER_SOLUTION                             DimmThermalHeatSpreaderSolution;     
  SPD4_MANUFACTURER_ID_CODE                                             RegisterManufacturerIdCode;          
  SPD4_RDIMM_REGISTER_REVISION_NUMBER                                   RegisterRevisionNumber;              
  SPD4_RDIMM_ADDRESS_MAPPING_FROM_REGISTER_TO_DRAM                      AddressMappingFromRegisterToDRAM;    
  SPD4_RDIMM_REGISTER_OUTPUT_DRIVE_STRENGTH_FOR_CONTROL_COMMAND_ADDRESS RegisterOutputDriveStrengthForControlCommandAddress; 
  SPD4_RDIMM_REGISTER_OUTPUT_DRIVE_STRENGTH_FOR_CLOCK                   RegisterOutputDriveStrengthForClock; 
  UINT8                                                                 Reserved[253 - 139 + 1];             
  SPD4_CYCLIC_REDUNDANCY_CODE                                           Crc;                                 
} SPD4_MODULE_REGISTERED;
 
typedef struct {
  SPD4_LRDIMM_MODULE_NOMINAL_HEIGHT           ModuleNominalHeight;         
  SPD4_LRDIMM_MODULE_NOMINAL_THICKNESS        ModuleMaximumThickness;      
  SPD4_LRDIMM_REFERENCE_RAW_CARD              ReferenceRawCardUsed;        
  SPD4_LRDIMM_MODULE_ATTRIBUTES               DimmModuleAttributes;        
  SPD4_LRDIMM_THERMAL_HEAT_SPREADER_SOLUTION  ThermalHeatSpreaderSolution; 
  SPD4_MANUFACTURER_ID_CODE                   RegisterManufacturerIdCode;  
  SPD4_LRDIMM_REGISTER_REVISION_NUMBER        RegisterRevisionNumber;      
  SPD4_LRDIMM_ADDRESS_MAPPING_FROM_REGISTER_TO_DRAM                           AddressMappingFromRegisterToDram;                       
  SPD4_LRDIMM_REGISTER_OUTPUT_DRIVE_STRENGTH_FOR_CONTROL_COMMAND_ADDRESS      RegisterOutputDriveStrengthForControlCommandAddress;    
  SPD4_LRDIMM_REGISTER_OUTPUT_DRIVE_STRENGTH_FOR_CLOCK                        RegisterOutputDriveStrengthForClock;                    
  SPD4_LRDIMM_DATA_BUFFER_REVISION_NUMBER     DataBufferRevisionNumber;    
  SPD4_LRDIMM_DRAM_VREFDQ_FOR_PACKAGE_RANK    DramVrefDQForPackageRank0;   
  SPD4_LRDIMM_DRAM_VREFDQ_FOR_PACKAGE_RANK    DramVrefDQForPackageRank1;   
  SPD4_LRDIMM_DRAM_VREFDQ_FOR_PACKAGE_RANK    DramVrefDQForPackageRank2;   
  SPD4_LRDIMM_DRAM_VREFDQ_FOR_PACKAGE_RANK    DramVrefDQForPackageRank3;   
  SPD4_LRDIMM_DATA_BUFFER_VREFDQ_FOR_DRAM_INTERFACE                   DataBufferVrefDQForDramInterface;               
  SPD4_LRDIMM_DATA_BUFFER_MDQ_DRIVE_STRENGTH_RTT_FOR_DATA_RATE        DataBufferMdqDriveStrengthRttForDataRateLe1866; 
  SPD4_LRDIMM_DATA_BUFFER_MDQ_DRIVE_STRENGTH_RTT_FOR_DATA_RATE        DataBufferMdqDriveStrengthRttForDataRateLe2400; 
  SPD4_LRDIMM_DATA_BUFFER_MDQ_DRIVE_STRENGTH_RTT_FOR_DATA_RATE        DataBufferMdqDriveStrengthRttForDataRateLe3200; 
  SPD4_LRDIMM_DRAM_DRIVE_STRENGTH                                     DramDriveStrength;                              
  SPD4_LRDIMM_DRAM_ODT_RTT_WR_RTT_NOM_FOR_DATA_RATE                   DramOdtRttWrRttNomForDataRateLe1866;            
  SPD4_LRDIMM_DRAM_ODT_RTT_WR_RTT_NOM_FOR_DATA_RATE                   DramOdtRttWrRttNomForDataRateLe2400;            
  SPD4_LRDIMM_DRAM_ODT_RTT_WR_RTT_NOM_FOR_DATA_RATE                   DramOdtRttWrRttNomForDataRateLe3200;            
  SPD4_LRDIMM_DRAM_ODT_RTT_PARK_FOR_DATA_RATE                         DramOdtRttParkForDataRateLe1866;                
  SPD4_LRDIMM_DRAM_ODT_RTT_PARK_FOR_DATA_RATE                         DramOdtRttParkForDataRateLe2400;                
  SPD4_LRDIMM_DRAM_ODT_RTT_PARK_FOR_DATA_RATE                         DramOdtRttParkForDataRateLe3200;                
  SPD4_LRDIMM_DATA_BUFFER_VREFDQ_FOR_DRAM_INTERFACE_RANGE             DataBufferVrefDQForDramInterfaceRange;          
  SPD4_LRDIMM_DATA_BUFFER_DQ_DECISION_FEEDBACK_EQUALIZATION           DataBufferDqDecisionFeedbackEqualization;       
  UINT8                                                               Reserved[253 - 157 + 1];                        
  SPD4_CYCLIC_REDUNDANCY_CODE                                         Crc;                                            
} SPD4_MODULE_LOADREDUCED;
 
typedef struct {
  UINT8                                                      Reserved0[191 - 128 + 1];              
  SPD4_NVDIMM_MODULE_PRODUCT_IDENTIFIER                      ModuleProductIdentifier;               
  SPD4_NVDIMM_SUBSYSTEM_CONTROLLER_MANUFACTURER_ID_CODE      SubsystemControllerManufacturerIdCode; 
  SPD4_NVDIMM_SUBSYSTEM_CONTROLLER_IDENTIFIER                SubsystemControllerIdentifier;         
  SPD4_NVDIMM_SUBSYSTEM_CONTROLLER_REVISION_CODE             SubsystemControllerRevisionCode;       
  SPD4_NVDIMM_REFERENCE_RAW_CARD                             ReferenceRawCardUsed;                  
  SPD4_NVDIMM_MODULE_CHARACTERISTICS                         ModuleCharacteristics;                 
  SPD4_NVDIMM_HYBRID_MODULE_MEDIA_TYPES                      HybridModuleMediaTypes;                
  SPD4_NVDIMM_MAXIMUM_NONVOLATILE_MEMORY_INITIALIZATION_TIME MaximumNonVolatileMemoryInitializationTime; 
  SPD4_NVDIMM_FUNCTION_INTERFACE_DESCRIPTOR                  FunctionInterfaceDescriptors[8];       
  UINT8                                                      Reserved[253 - 220 + 1];               
  SPD4_CYCLIC_REDUNDANCY_CODE                                Crc;                                   
} SPD4_MODULE_NVDIMM;
 
typedef union {
  SPD4_MODULE_UNBUFFERED              Unbuffered;               
  SPD4_MODULE_REGISTERED              Registered;               
  SPD4_MODULE_LOADREDUCED             LoadReduced;              
  SPD4_MODULE_NVDIMM                  NonVolatile;              
} SPD4_MODULE_SPECIFIC;
 
typedef struct {
  UINT8                               ModulePartNumber[348 - 329 + 1]; 
} SPD4_MODULE_PART_NUMBER;
 
typedef struct {
  UINT8                               ManufacturerSpecificData[381 - 353 + 1]; 
} SPD4_MANUFACTURER_SPECIFIC;
 
typedef UINT8                         SPD4_MODULE_REVISION_CODE;
typedef UINT8                         SPD4_DRAM_STEPPING;       
 
typedef struct {
  SPD4_UNIQUE_MODULE_ID               ModuleId;                 
  SPD4_MODULE_PART_NUMBER             ModulePartNumber;         
  SPD4_MODULE_REVISION_CODE           ModuleRevisionCode;       
  SPD4_MANUFACTURER_ID_CODE           DramIdCode;               
  SPD4_DRAM_STEPPING                  DramStepping;             
  SPD4_MANUFACTURER_SPECIFIC          ManufacturerSpecificData; 
  UINT8                               Reserved[2];              
} SPD4_MANUFACTURING_DATA;
 
typedef struct {
  UINT8                               Reserved[511 - 384 + 1];  
} SPD4_END_USER_SECTION;
 
typedef struct {
  SPD4_BASE_SECTION                   Base;                     
  SPD4_MODULE_SPECIFIC                Module;                   
  UINT8                               Reserved[319 - 256 + 1];  
  SPD4_MANUFACTURING_DATA             ManufactureInfo;          
  SPD4_END_USER_SECTION               EndUser;                  
} SPD_DDR4;
 
#pragma pack (pop)
#endif